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Dynamic enabling and disabling of simd units in graphics processors

A graphics processing unit and processor technology, applied in image data processing, data processing power supply, 3D image processing, etc., can solve the problems of increasing graphics processor power consumption, low efficiency, etc., and achieve optimal use and power saving Effect

Active Publication Date: 2016-07-06
ADVANCED MICRO DEVICES INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, traditional methods continuously and actively provide clock signals to these SIMD
This method increases the power consumption of the graphics processor and is inefficient

Method used

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  • Dynamic enabling and disabling of simd units in graphics processors
  • Dynamic enabling and disabling of simd units in graphics processors
  • Dynamic enabling and disabling of simd units in graphics processors

Examples

Experimental program
Comparison scheme
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Embodiment Construction

[0030] As discussed above, embodiments of the present invention achieve power savings by dynamically activating and deactivating individual SIMDs in shader compositors.

[0031] Embodiments dynamically disable SIMD for reduced performance needs of graphics processing units or to reduce thermal design power (TDP). Furthermore, embodiments enable disabled SIMD for high performance applications without refreshing the graphics pipeline of the graphics processing unit. This is achieved by dynamically switching several SIMDs without flushing the SP. Dynamic control (or switching) is achieved in part by appropriately programming groups of registers.

[0032] In an embodiment, a Shader Pipe Interposer (SPI) allocates new work (or threads) according to registers configured to dynamically indicate which SIMDs are activated. In one embodiment, this dynamic configuration takes effect after currently outstanding requests (or pending requests) are serviced by a disabled SIMD. Once disabl...

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PUM

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Abstract

The present invention describes a system and method for increasing performance in a graphics processing unit. Embodiments achieve power savings in graphics processing units by dynamically activating / deactivating individual SIMDs in shader compositors containing multiple SIMD units. Dynamic on-the-fly disabling and enabling of individual SIMDs provides flexibility to achieve desired performance and power levels in a given processing application. In this way, embodiments enable optimal use of graphics processing units. Embodiments of the present invention also implement SIMD dynamic texture (eg medium texture) clock gating in the shader compositor. The embodiment provides a clock mechanism on demand and closes unused logical clock trees to reduce switching power. In this way, embodiments enhance clock gating to save more switching power for the duration when the SIMD is idle (or not assigned any work).

Description

technical field [0001] Embodiments of the invention generally relate to the control of a single instruction multiple data (SIMD) unit in a graphics processing unit (GPU). Background technique [0002] The arithmetic unit of the graphics processor includes an arithmetic logic unit (ALU) or an arithmetic unit configured to perform integer, logical, and single / double precision floating point operations. [0003] Graphics processors may include arrays of arithmetic units known as shader cores. A shader core includes a shader pipeline (SP). For higher performance, multiple SPs can be configured to work together as stacked SPs. SPs can be configured as Quad Arrays (QP) and SIMD. All shader units per SIMD can conditionally execute the same ALU instruction on different sets of origin, vertex, or pixel values. In this way, SIMD provides arithmetic processing power to the graphics processor. [0004] In conventional GPUs with stacked SPs, SIMD can be statically enabled or disable...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F9/30G06F9/38G06F1/32G06T15/00
CPCG06F1/3203G06F1/3287G06F9/30101G06F9/3842G06F9/3867G06T15/005G06T13/20G06T2210/52G06F9/5094G06F9/3897G06F9/3887Y02D10/00Y02D30/50G06F9/3888G06F9/38G06F9/30G06F1/32G06T15/00G06F9/50
Inventor 图沙尔·K·沙阿拉沙德·奥雷费基迈克尔·J·曼特布莱恩·恩贝林
Owner ADVANCED MICRO DEVICES INC
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