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Content addressing method based on hash chain table and corresponding storage circuit

A technology of content addressing and memory, which is applied in the field of content addressable memory, and can solve the problems of high resource consumption, high cost, unfavorable expansion of search depth and width, etc.

Active Publication Date: 2013-04-24
西安翔腾微电子科技有限公司
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  • Application Information

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Problems solved by technology

The existing technology is mainly realized by transistor-level fully customized circuit design, which has the advantage of fast retrieval speed, and the disadvantage of requiring special technology and high cost, which is not conducive to large-scale use; currently, circuits based on RTL design generally use serial, parallel, and dichotomous methods , hashing method and other design ideas, the designed circuit is either slow in retrieval speed or consumes too much resources, which is not conducive to the expansion of retrieval depth and width, and cannot meet the requirements of modern network communication and data processing for retrieval depth and speed

Method used

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  • Content addressing method based on hash chain table and corresponding storage circuit
  • Content addressing method based on hash chain table and corresponding storage circuit
  • Content addressing method based on hash chain table and corresponding storage circuit

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Embodiment Construction

[0061] The following describes the specific implementation of the content addressable memory circuit from two aspects of functional architecture and workflow:

[0062] 1. Functional Architecture

[0063] The functional block diagram of the content addressable memory circuit is shown in figure 1 As shown, the content-addressable memory circuit includes a control unit, a memory unit, a register interface and a data retrieval and comparison interface. The specific implementation method is as follows:

[0064] 1.1 Register interface

[0065] Register read and write interface, with chip select signal CS, read and write signal WR, register address bus ADD, input data bus DATAIN[31:0], output data bus [31:0], clock CLK and reset RST, and address decoding and data selection.

[0066] Content-addressable memory registers are defined as image 3 As shown, including configuration registers, command registers, flag registers, keyword registers and content registers, etc., the specific...

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Abstract

The invention relates to a content addressing method based on a hash chain table and a corresponding storage circuit. The storage circuit includes a storage unit, a control unit, a register interface and a data search comparison interface. The content addressing method adopts the methods of hash, chain, multi-character parallel storage, comparison and the like, resolves the problem in the prior art of use limit caused by the fact that a special process or a device is adopted to achieve the content addressing storage and the problems of small content addressing search speed, large consumption resources, difficulty in content addressing search depth and width expansion and the like in a traditional design method, has the advantages of being high in generality, high in search speed, high in hardware utilization rate, easy to expand and the like, and is not limited by the chip process or a field programmable gate array (FPGA) device.

Description

technical field [0001] The invention belongs to computer hardware technology, and relates to a method for realizing content addressing memory. Background technique [0002] Content Addressable Memory (CAM) is a special memory array. Its main working mechanism is to automatically compare an input data item with all data items stored in the CAM, and output the corresponding data item It has the characteristics of fast retrieval speed and flexible use, and is widely used in network communication and other fields. The existing technology is mainly realized by transistor-level fully customized circuit design, which has the advantage of fast retrieval speed, and the disadvantage of requiring special technology and high cost, which is not conducive to large-scale use; currently, circuits based on RTL design generally use serial, parallel, and dichotomous methods , hashing method and other design ideas, the designed circuit is either slow in retrieval speed or consumes too much res...

Claims

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Application Information

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IPC IPC(8): G06F17/30G06F12/02
Inventor 田泽张荣华张玲刘航
Owner 西安翔腾微电子科技有限公司
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