Plane gate type IGBT (Insulated Gate Bipolar Translator) chip production method

Abstract

The invention discloses a plane gate type IGBT (Insulated Gate Bipolar Translator) chip production method. The method comprises the steps: firstly carrying out front side processing, and injecting and annealing a second N type current carrier buried layer to a semiconductor substrate; etching, injecting and annealing a first N type current carrier buried layer injection window; etching a first N type current carrier buried layer; removing an oxidization layer on the surface of the semiconductor substrate; depositing an insulating material on the outer surface of the first N type current carrier buried layer, and photoetching and etching the deposited insulating material to form a media buried layer; completing the remaining front side processing technology; conducting back side processing, thinning the back side part to the needed thickness; injecting, doping and propelling and annealing an N buffer layer; injecting, doping and propelling and annealing a P+ collector electrode region; and producing a metal collector electrode. According to the plane gate type IGBT chip production method, the drop voltage of an IGBT chip is reduced, the compromise relation of the turn-off loss can be optimized, and lower power consumption can be realized, so that the power density, operating junction temperature and reliability of the IGBT chip can be improved.

Description

technical field [0001] The invention relates to a method for manufacturing a semiconductor IGBT (Insulted Gate Bipolar Transistor, insulated gate bipolar transistor) chip, in particular to a method for manufacturing a planar gate IGBT chip with double hole blocking effect. Background technique [0002] Insulated gate bipolar transistor (IGBT) has the characteristics of on-state voltage drop, large current capacity, high input impedance, fast response and simple control, and is widely used in industry, information, new energy, medicine, transportation, military and aviation fields . as attached figure 1 Shown is a schematic structural diagram of a conventional planar gate IGBT, which includes a gate 1 , an emitter 2 , a collector 3 , a P-well 4 , an N drift region 5 and an N buffer region 6 . In order to reduce the turn-on voltage drop of the IGBT, a trench gate structure is used. However, after trench etching, the surface is rough and the damage is large, which will affec...

AI Technical Summary

Problems solved by technology

But the patent is only for trench gate IGBT, not mentioning planar gate IGBT structure

In addition, the patent does not involve N-type carrier buried layer structure

[0008] The various existing technologies mentioned above have enhanced the conductance modulation effect of the IGBT to a certain extent, thereby reducing the conduction voltage drop, but these solutions only have a single hole blocking effect (only a barrier blocking effect)

The aforementioned patent proposes a method with physical barrier effect, but only limited to trench gate IGBT

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