Secondary power source with latch-up resistance function

Abstract

The invention provides a secondary power source with a latch-up resistance function, which comprises an input filter, a DC / DC (Direct Current / Direct Current) transducer, a three terminal regulator, a low dropout linear regulator and a power-off delay secondary power-up function circuit. The external primary power supply voltage is sequentially filtered through the input filter and reduced and isolated through the DC / DC transducer, and then is transmitted to the three terminal regulator for primary voltage regulation filtering; the output of the three terminal regulator is transmitted to the low dropout linear regulator for secondary voltage regulation filtering; and the needed secondary voltage is generated by the low dropout linear regulator and then is output. The power-off delay secondary power-up function circuit utilizes a detection resistor, a resistance-voltage-dividing network and a power supply voltage monitoring chip to form a voltage monitoring circuit for the secondary power source; when the voltage is lower than a threshold value through detection, the low dropout linear regulator is closed automatically, the latch of a CMOS (Complementary Metal Oxide Semiconductor) device is released because of power-off, and the output voltage gets back to normal again after the secondary power-up is performed, so that the power-off delay secondary power-up function is achieved, and the latch of the CMOS device can be released reliably.

Description

technical field [0001] The invention relates to a secondary power supply for space. Background technique [0002] During the operation of the spacecraft in orbit, the electronic equipment on the planet is always in the radiation environment of space charged particles, and some CMOS devices will be bombarded by high-energy charged particles in space, resulting in single event upset (SEU), latch-up (SEL) or even burning ( SEB) phenomenon, especially some CMOS devices with low radiation resistance indicators, such as static random access memory (SRAM) HM1-65642, etc., are more prone to flipping and latching, so spacecraft electronic products have always been reliable to prevent CMOS device latching Key points and difficulties in safety and security design. Based on the principle of latch generation and release, current limiting design of power supply is an ideal solution. At present, current limiting resistors or low dropout linear regulators (LDOs) are generally used for anti...

AI Technical Summary

Problems solved by technology

However, this secondary power supply has the following disadvantages: First, simply using a low-dropout linear regulator for primary voltage regulation, the quality of the output secondary power supply is easily affected by the quality of the output voltage of the previous DC / DC converter. And it is difficult to match the appropriate DC / DC output voltage. If the DC / DC output voltage is too high, it will increase the power consumption of the low dropout linear regulator. If it is too low, it will affect the realization of the overcurrent protection function of the low dropout linear regulator, which is not conducive to The best performance of the characteristics of the low-dropout linear regulator; second, it does not have the function of power-off delay and power-on; third, the overcurrent current depends on the rated output capability of the low-dropout linear regulator itself, and it cannot be latched according to different devices. lock time for current regulation

Therefore, existing secondary power supply designs using LDOs cannot ensure that latched-up devices can be reliably released from latch-up

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