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Active pull-down circuit for driving capacitive load

A capacitive load, driving current technology, applied in logic circuits, electronic switches, electrical components, etc., can solve the problem of increased power consumption of ECL circuits, and achieve the effects of increasing power consumption, fast driving, and increasing circuit area and complexity.

Active Publication Date: 2014-09-17
迅芯微电子(苏州)股份有限公司
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Increasing the operating current of the emitter follower can reduce the falling time and reduce the difference between rising time and falling time, but the power consumption of the ECL circuit is also greatly increased

Method used

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  • Active pull-down circuit for driving capacitive load
  • Active pull-down circuit for driving capacitive load
  • Active pull-down circuit for driving capacitive load

Examples

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Embodiment Construction

[0043] In order to make the object, technical solution and advantages of the present invention clearer, the present invention will be described in further detail below in conjunction with specific embodiments and with reference to the accompanying drawings.

[0044] It should be noted that the specific implementation of the present invention uses a negative power supply for power supply, the upper rail of the power supply is grounded, and the lower rail is the negative power supply VEE. Of course, a positive power supply can also be used. At this time, the upper rail of the power supply is the power supply VCC, and the lower rail is grounded.

[0045] The active pull-down circuit for driving capacitive loads provided by the present invention introduces a delay control circuit on the basis of the emitter-follower output of the traditional emitter-follower coupling logic, and makes full use of the characteristic that the phase of the differential output is inverting. Redistribut...

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PUM

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Abstract

The invention discloses an active pull-down circuit for driving a capacitive load. The active pull-down circuit comprises an input unit, a driving unit and a delay unit, the input unit is connected with the driving unit and used for converting inputted signals into differential signals, the driving unit is connected to the delay unit, is used for providing active driving current and shares and redistributes current of a driving current source, and the delay unit is used for controlling the driving current source in the driving unit after delaying outputted signals. When high-level output is switched to low-level output, the load capacitor is quickly discharged and when low-level output is switched to high-level output, the load capacitor is quickly charged, so that high-level outputted signals and low-level outputted signals are quickly switched. The capacitive load is quickly driven under conditions without increasing power consumption or obviously increasing the area and the complexity of the circuit, and the active pull-down circuit has the advantages of simplicity, low power consumption, fast working speed, high driving capacity and the like.

Description

technical field [0001] The invention relates to the field of integrated circuit design, in particular to an active pull-down circuit for driving capacitive loads, which is used to drive capacitive loads such as capacitors, interconnect lines, and transistor arrays. Background technique [0002] Emitter coupled logic (ECL), also known as current switching logic circuit, is widely used in bipolar digital integrated circuits because of its fast working speed and short average delay time. The ECL circuit consists of two parts, the first is the differential pair logic controlled by the current switch, and the second is the emitter follower as the output buffer. The operating current of the emitter follower is determined by a resistor or a current source, which is generally fixed. . In large-scale integrated circuits, ECL circuits drive multi-stage load circuits. Due to the parasitic resistance and parasitic capacitance of the transistors and interconnect lines that make up the ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H03K19/01H03K17/28
Inventor 武锦陈建武吴旦昱周磊刘新宇金智
Owner 迅芯微电子(苏州)股份有限公司
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