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Multi-grain parallel storage system and storage

A storage system and memory technology, applied in the storage field, can solve problems such as inability to read and write across rows, and inability to read and write matrix row and column data in parallel, and achieve the effect of improving execution efficiency

Active Publication Date: 2012-07-04
上海思朗科技有限公司
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  • Claims
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Problems solved by technology

[0008] The technical problem to be solved by the present invention is to overcome the shortcomings of the traditional on-chip storage system that cannot read and write matrix row and column data in parallel and cannot read and write across rows, and improve the read and write efficiency of the storage system and memory

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Embodiment Construction

[0038] In order to make the object, technical solution and advantages of the present invention clearer, the present invention will be described in further detail below in conjunction with specific embodiments and with reference to the accompanying drawings.

[0039] For the convenience of explaining the content of the invention, each data bit width is measured in units of storage units, which are defined as the addressing unit of the memory and are also the minimum data bit width that can be read and written by the memory. All the sentences containing "the bit width is W" appearing in the description process need to be understood as bits of W storage units. For example, when the storage unit is an 8-bit byte type, the actual bit width of the memory with a read-write port bit width of 4 is 4×8=32 bits. Also, all objects are numbered from left to right, starting from 0. In addition, as mentioned above, "granularity" refers to the number of storage units with consecutive address...

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Abstract

The invention discloses a multi-grain parallel storage system and a storage (300) supporting array multi-grain parallel reading and writing. The storage system includes a reading and writing port (301) and the storage (300); the storage comprises W storage blocks (305) and a data strobe network (302); each storage block (305) is a two-dimensional array comprising a plurality of storage units (303); each storage line (304) in the two-dimensional array includes W storage units (303); each storage block can read and write one storage line (304) once; and w is 2 to the power of n, and n is a natural number. The storage system provided by the invention can support different data types of matrix array data parallel reading at the same time, thereby radically clearing the transpose operation requirement in the signal processing algorithm, and improving the executing efficiency of the signal processing algorithm.

Description

technical field [0001] The invention belongs to the technical field of storage, and mainly relates to an on-chip storage system in an embedded signal processing platform, in particular to a multi-granularity parallel storage system and a memory that support multi-granularity parallel reading and writing of rows and columns. Background technique [0002] With the development of integrated circuit technology, more computing components and larger static memory SRAM capacity can be integrated on the chip. Multiple computing components and multiple large-capacity, large-bit-width on-chip memories can be designed in the high-speed embedded signal processing chip to realize parallel computing and parallel storage. Signal processing algorithms often organize input / output data in the form of matrices and perform calculations using matrices as objects. Matrix data is generally stored in memory by row or by column. The memory read and write ports have a fixed bit width and are addres...

Claims

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Application Information

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IPC IPC(8): G06F13/16G06F12/06
Inventor 王东琳谢少林薛晓军刘子君张志伟
Owner 上海思朗科技有限公司
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