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Method and device for threading serial program in nonuniform memory access system

A serial program and memory access technology, which is applied in the direction of multi-programming devices, machine execution devices, concurrent instruction execution, etc., can solve problems such as reducing the performance of multi-core processors and affecting the execution effect of multi-threading mechanisms, and achieve slow memory access Delay effect

Active Publication Date: 2012-06-27
HUAWEI TECH CO LTD +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0007] When the above solution is applied to NUMA, there is a memory access delay when the CPU core accesses the memory, and the memory access delay will affect the execution effect of the speculative multi-threading mechanism, thereby reducing the performance of the multi-core processor

Method used

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  • Method and device for threading serial program in nonuniform memory access system
  • Method and device for threading serial program in nonuniform memory access system
  • Method and device for threading serial program in nonuniform memory access system

Examples

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Embodiment 1

[0031] The embodiment of the present invention provides a threaded serial program method in a non-uniform memory access system, such as figure 1 As shown, the method includes:

[0032] Step 101: Receive a serial program to be processed.

[0033] Specifically, in this embodiment, in the NUMA system, the computer receives the serial program to be processed through the program analysis tool in the operating system, and performs pre-compilation and optimization of the code of the serial program, and the serial program The program code is converted into intermediate code to prepare for further code analysis, for example:

[0034] Such as image 3 As shown, the computer compiles the code of the serial program through the SUIF front-end compilation tool in the program analysis tool to obtain the intermediate code, and optimizes the intermediate code through the SUIF optimizer to obtain the optimized intermediate code.

[0035] Step 102: Obtain information about a multi-core processor.

[0036...

Embodiment 2

[0047] The embodiment of the present invention provides a threaded serial program method in a non-uniform memory access system, such as figure 2 As shown, the method includes:

[0048] Step 201: Receive the serial program to be processed.

[0049] Step 202: Acquire information of a multi-core processor, where the information of the multi-core processor includes at least one of the interconnect structure information of the multi-core processor and the delay information of all processor cores.

[0050] Wherein, the delay information includes the memory access delays of all the processor cores.

[0051] Step 203: Determine the loop body in the loop part, and obtain the data transmission amount of each loop body between every two loops.

[0052] Step 204: Determine whether the data transmission volume is less than a preset value.

[0053] Wherein, if the data transmission amount is less than the preset value, the loop body is an available loop body in the serial program; if the data transmi...

Embodiment 3

[0089] The embodiment of the present invention provides a threaded serial program device in a non-uniform memory access system, such as image 3 As shown, the device includes: a receiving module 501, an extraction module 502, a threading module 503, and an allocation module 504.

[0090] The receiving module 501 is used to receive the serial program to be processed.

[0091] The extraction module 502 is configured to obtain information of a multi-core processor, where the information of the multi-core processor includes at least one of interconnect structure information of the multi-core processor and delay information of all processor cores.

[0092] Wherein, the delay information includes the memory access delays of all the processor cores.

[0093] The threading module 503 is configured to thread the loop part of the serial program into a speculative thread, and thread the serial part of the serial program into a control thread.

[0094] The allocation module 504 is configured to all...

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Abstract

The embodiment of the invention discloses a method and a device for threading a serial program in a nonuniform memory access system, which relates to the multi-thread technical field, and can alleviate the worsening of properties of a multi-nuclear processor caused by the access and memory delay difference when executing the serial program in the nonuniform memory access system. The method comprises the steps that: the serial program to be processed is received; information of a multi-nuclear processor is acquired, and the information comprises an internet structure information of the multi-nuclear processor and at least one item in the access and memory delay of each processor nuclear; a usable cycling part of the serial program is threaded into an inferred thread, and a serial part and an unusable cycling part of the serial program are threaded into a control thread; and the control thread and the inferred thread are allocated to the processor nuclear according to at least one of the internet structure information and the delay information. The method and the device are used for executing the serial program in a threading way in the nonuniform memory access system supporting an inferred multi-thread mechanism.

Description

Technical field [0001] The present invention relates to the field of multithreading technology, in particular to a method and device for threaded serial programs in a non-uniform memory access system. Background technique [0002] With the development of multi-core chip (Chip Multi-Processor, CMP) technology, multi-core processors are widely used. Existing multi-core processors mainly have two structural forms: UMA (Uniform Memory Access, unified memory access) and NUMA (Non-Uniform Memory Access, non-uniform memory access). [0003] In UMA, there are multiple CPUs (Central Processing Unit, central processing unit / processor) working symmetrically in a device, sharing the same physical memory, all resources except the CPU are shared, and each CPU accesses any of the memory The address requires the same time; there are multiple CPU modules in NUMA, each CPU module is composed of multiple CPU cores and has independent local memory, input and output interfaces, etc. Different CPU mod...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F9/38G06F9/50
Inventor 李艳华张悠慧谭玺
Owner HUAWEI TECH CO LTD
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