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Bit level nonvolatile static random access memory and implementation method thereof

A static random access, non-volatile technology, applied in static memory, read-only memory, information storage, etc., can solve the problem that NVSRAM cannot be realized at the bit level, and achieve the effect of shortening storage time and simple control circuit

Active Publication Date: 2012-03-28
SHANGHAI XINCHU INTEGRATED CIRCUIT
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  • Abstract
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AI Technical Summary

Problems solved by technology

[0006] The invention overcomes the defect that NVSRAM cannot be realized by bit level in the prior art, and proposes a bit-level non-volatile static random access memory and its realization method

Method used

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  • Bit level nonvolatile static random access memory and implementation method thereof
  • Bit level nonvolatile static random access memory and implementation method thereof
  • Bit level nonvolatile static random access memory and implementation method thereof

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Embodiment Construction

[0037] With reference to the following specific embodiments and drawings, the present invention will be further described in detail, and the protection content of the present invention is not limited to the following embodiments. Without departing from the spirit and scope of the inventive concept, changes and advantages that can be imagined by those skilled in the art are all included in the present invention, and the appended claims are the protection scope.

[0038] Such as Figure 1-2 , 1-PMOS transistor, 2-PMOS transistor, 3-NMOS transistor, 4-NMOS transistor, 5-NMOS transistor, 6-NMOS transistor, 7-NMOS transistor, 8-NMOS transistor, 9-phase change resistance, 10-phase Variable resistance, 11-static memory cell, 12-phase-change memory cell, 13-phase-change memory cell, 14-nonvolatile static memory cell, 20-nonvolatile static memory cell array, 21-word line decoding Adapter, 22-bit line decoder, 23-precharge circuit, 24-multiplexer, 25-read circuit, 26-write circuit.

[0039...

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PUM

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Abstract

The invention discloses a bit level nonvolatile static random access memory. The bit level nonvolatile static random access memory comprises a nonvolatile static storage cell array, a word line decoder, a bit line decoder, a pre-charging circuit, a multi-channel selector, a reading circuit and a writing circuit, wherein the bit level nonvolatile static storage cell array is connected with the word line decoder through ordinary read-write word lines and storage and recovery control word lines, and is connected with the bit line decoder and the pre-charging circuit through bit lines and opposite bit lines; the multi-channel selector is connected with the bit line decoder through a data bus, and is connected with the reading circuit and the writing circuit; and the nonvolatile static storage cell array includes nonvolatile static storage cells. The bit level nonvolatile static random access memory provided by the invention is capable of bit level storage and data recovery, the control circuit is simple, and the recovery time after power failure of the system is greatly shortened.

Description

Technical field [0001] The invention relates to a static memory, in particular to a bit-level non-volatile static random access memory and an implementation method thereof. Background technique [0002] Memory is an important part of the semiconductor industry. With the rapid growth of the consumer electronics market in recent years, the market for memory has become larger and larger. At present, the mainstream memory on the market includes static random access memory (SRAM), dynamic random access memory (DRAM) and flash memory (FLASH), etc. These memories play an important role in all aspects. [0003] As we all know, in the field of non-volatile memory, the market is steadily increasing. Recently, the static random access memory (SRAM) family has added a new member, non-volatile SRAM (Non-volatile SRAM), which has the advantages of both SRAM and FLASH, and is mainly used to save important data that cannot be lost when power is off. Wide range of applications. For example, netw...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G11C16/06G11C16/24
Inventor 亢勇陈邦明
Owner SHANGHAI XINCHU INTEGRATED CIRCUIT
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