Method for allocating registers for mixed length instruction set

Abstract

The invention discloses a method for allocating registers for a mixed length instruction set. By less revising the conventional graph coloring register allocation method, namely fully utilizing the characteristics of a mixed coding instruction set, codes with higher code density are generated. The method has the characteristics of simplicity, practicability and high in reliability.

Description

technical field [0001] The invention relates to a compiling technology, in particular to a register allocation method for mixed-length instruction sets. Background technique [0002] Embedded systems often adopt RISC architecture, and their instruction sets are generally fixed-length instruction sets, that is, instructions with only a single length. The instruction length is generally an integer number of bytes, for example, a 16-bit instruction and a 32-bit instruction. A longer instruction length can encode more operands, address more registers, or use a larger immediate value, etc., so it generally has better performance; while a shorter instruction length can make the compiled generated Executors are smaller. In order to have high code density of short instructions while having high performance of long instructions, modern RISC processors begin to use two or more instruction sets with mixed codes of different lengths. For example, ARM's thumb2 instruction set and Zhon...

AI Technical Summary

Problems solved by technology

Taking cskyv2 as an example, if a register operand of an instruction is assigned a register of R16~R31, then the instruction will generate a long instruction (except for individual instructions, which will be introduced below); but even if an instruction only uses R0~ The register of R15, it does not necessarily generate a short instruction, because it may use an immediate value beyond the encodable range of a short instruction, or use 3 different operands, etc.

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