Formation method of LED

Abstract

The invention provides a formation method of a light emitting diode (LED). The method comprises the following steps that: a Si substrate is provided; a plurality of projection structures are formed on the Si substrate, wherein there is a certain gap between each two projection structures; a first semiconductor thin layer is formed to cover the plurality of projection structures and is connected with tops of the plurality of projection structures; and an LED structure, which contains a first-type group III-V compound material layer, a luminescent layer, a second type group III-V compound material layer, is formed on the first semiconductor thin layer. The plurality of projection structures enable a heat mismatch stress between an Si wafer and a semiconductor material layer of nitride-system compound to be released effectively, so that a large-sized epitaxial wafer can be formed favorably.

Description

technical field [0001] The invention relates to the technical field of semiconductor design and manufacture, in particular to a method for forming an LED (light emitting diode). Background technique [0002] With the continuous progress of green energy, light emitting diodes (light emitting diodes, LEDs) are widely used in display screens, backlights, special lighting and other fields due to their long life, high luminous efficiency, small size, durability, and rich colors. The core of the LED is the LED epitaxial wafer, and its main structure includes: a substrate, a buffer layer, an N-type semiconductor layer, an active region light-emitting layer, an electron blocking layer, and a P-type semiconductor layer. As the core of the LED epitaxial wafer, the light-emitting layer in the active area is between the N-type semiconductor layer and the P-type semiconductor layer, so that the interface between the P-type semiconductor layer and the N-type semiconductor layer forms a PN...

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Problems solved by technology

[0003] However, there is a large lattice mismatch and thermal stress mismatch between Si and these III-V materials. The lattice mismatch causes dislocations, and the thermal stress mismatch will cause film cracks (Crack) when the epitaxial thickness is large. , the quality of the epitaxial film is poor, so the thickness of the epitaxial film is limited

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