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Manufacturing method of LED chip

A technology of LED chip and manufacturing method, which is applied in the direction of electrical components, circuits, semiconductor devices, etc., can solve the problems of high masking layer requirements, device damage, and affecting the connection of LED chips, and achieve simple process, easy realization, and solution to fracture problems Effect

Inactive Publication Date: 2011-09-07
XIANGNENG HUALEI OPTOELECTRONICS
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0007] The purpose of the present invention is to provide a method for manufacturing LED chips to solve the following technical problems in the prior art: when ICP forms isolation grooves, the heat generated by plasma bombarding the surface of the device for a long time will damage the device and affect the shielding. The layer requirements are high, and metal masking layers such as nickel and gold are generally required. The formation process of the masking layer is complicated; and the metal interconnection line is easy to break when it crosses the isolation groove with a relatively deep side wall, especially with a relatively vertical side wall, which affects the LED chips. connection and other technical issues

Method used

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  • Manufacturing method of LED chip

Examples

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Embodiment 1

[0033] Provide a sapphire substrate, form a buffer layer on the substrate; form an epitaxial layer on the buffer layer, specifically comprising the following steps: forming a first semiconductor layer on the buffer layer, forming a light emitting layer on the first semiconductor layer, and forming a second semiconductor layer on the luminescent layer. A first mask layer is formed on the epitaxial layer after surface cleaning, and a first gap with a width of 10 μm is reserved between units of the first mask layer according to the design. Wherein, the material of the mask layer may be photoresist.

[0034] The second semiconductor layer, light-emitting layer, and part of the first semiconductor layer at the first gap position are removed by ICP, a first groove with a depth of 2 μm is formed on the epitaxial layer, and the first mask layer is removed.

[0035] Formed on the epitaxial layer, a second mask layer is formed, the size of the second mask layer is limited within the ou...

Embodiment 2

[0041] A sapphire substrate is provided; a buffer layer is formed on the substrate, and an epitaxial layer is formed on the buffer layer, specifically comprising the following steps: forming a first semiconductor layer on the buffer layer, forming a light emitting layer on the first semiconductor layer, and forming a second semiconductor layer on the luminescent layer. The rest of the operation method is the same as that of Embodiment 1, except that the width of the first gap is 15 μm, the first groove with a depth of 3 μm is formed on the epitaxial layer, and the edge of the second mask layer is retracted by 15 μm from the first mask layer. The second ICP etching, the depth is 3 μm, the edge of the third mask layer is 15 μm inward than the second mask layer, the third ICP etching, the depth is 1.5 μm, and the thickness of the electrical insulating layer is 8000 angstroms.

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Abstract

The invention discloses a manufacturing method of an LED chip, wherein a procedure of removing one part of an epitaxial layer comprises the following steps of: forming a first mask film layer on the epitaxial layer, wherein the first mask film layer comprises a plurality of mask film layer units isolated from one another, and a first clearance with a predetermined size is arranged among the maskfilm layer units; removing a second semiconductor layer, a lighting layer and one part of a first semiconductor layer from a region where the first clearance is located to form a groove; eliminating the first mask film layer; repeating the steps for N times to remove parts of the epitaxial layer and a buffer layer until reaching a substrate, reserving an Nth clearance with predetermined size among the mask film layer units, wherein the width of the Nth clearance is greater than that of a (N-1)th clearance; forming an isolating groove with N steps, wherein N is not smaller than 2. By applying the technical scheme of the invention, the isolating groove has smaller depth and greater width as well as a certain inclination degree, thereby being beneficial to the coverage of an insulating material and the adhesion of metal connection wires, and solving the problem of breakage probably caused when the metal connection wires cross a deeper groove.

Description

technical field [0001] The invention relates to a method for manufacturing a light-emitting element array, in particular to a method for manufacturing an LED chip. Background technique [0002] Compared with high-power chips, low- and medium-power chips are driven by small currents, have good light efficiency, heat dissipation performance, and high reliability, and are widely used in the field of lighting and auxiliary lighting. In order to obtain sufficient brightness and illuminance, enough LED lamp beads need to be soldered to the substrate or printed circuit board in a series-parallel manner, that is, to package first and then integrate. The array type high-voltage AC LED chip has multiple LED unit cells (sub-chips), which are properly connected in series or in parallel according to requirements to meet specific electrical requirements, that is, first integrated and then packaged. [0003] In view of the good conductivity of N-type GaN, to obtain discrete devices, it is...

Claims

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Application Information

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IPC IPC(8): H01L33/00
Inventor 姚禹许亚兵岑龙斌
Owner XIANGNENG HUALEI OPTOELECTRONICS
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