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IEEE1588 based accurate clock synchronization protocol system and synchronization method thereof

A precise clock synchronization and protocol technology, applied in transmission systems, synchronization devices, digital transmission systems, etc., can solve the problems of increased network traffic, no frequency compensation, and reduced synchronization accuracy, so as to overcome crystal oscillator drift and reduce communication. The effect of bandwidth

Active Publication Date: 2011-02-16
SHANGHAI JIAO TONG UNIV
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Problems solved by technology

[0006] However, although the clock synchronization technology of the above-mentioned technologies is implemented by hardware, since the data link layer uses commercial integrated chips, the time stamp processing module is not integrated with the data link layer, so each synchronization process mainly Nodes need to send a follow message (FollowUp), which contains the precise time stamp information when sending the synchronization message (Sync), thus increasing the traffic of the network; when the follow message is not sent, the traditional synchronization system can only The Sync message contains an estimated sending timestamp information, which will reduce the synchronization accuracy
Furthermore, the method of achieving clock synchronization in the above technology is only to periodically correct the slave clock, so that the deviation of the master-slave clock at the moment of correction is zero, without frequency compensation, resulting in the change of the deviation between the slave clock and the master clock over time Gradually increasing, this kind of drift cannot be tolerated in the case of high-precision synchronization

Method used

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  • IEEE1588 based accurate clock synchronization protocol system and synchronization method thereof
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Embodiment Construction

[0034] The embodiments of the present invention are described in detail below. This embodiment is implemented on the premise of the technical solution of the present invention, and detailed implementation methods and specific operating procedures are provided, but the protection scope of the present invention is not limited to the following implementation example.

[0035] like figure 1 As shown, this embodiment includes: a CPU management and control module 10, an Ethernet media access controller module 11 with time stamp management, a local reference clock module 12, and a physical layer transceiver (PHY) module 13; wherein: the CPU The management and control module 10 also includes a communication interface unit 100 and a PTP protocol stack 101 .

[0036] The communication interface unit 100 is used to realize the packet sending and receiving of PTP data packets, and completes the data interaction work between the CPU management and control module 10 and the Ethernet media ...

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Abstract

The invention relates to an IEEE 1588 based accurate clock synchronization protocol system and a synchronization method thereof, belonging to the technical field of network information transmission. By adopting the invention, a main clock carries an accurate timestamp while sending a synchronization message, and a follow message is not required to be sent, thus greatly reducing communication bandwidth required for realizing clock synchronization. Meanwhile a frequency adjustable clock counter is constructed, and clock synchronization algorithm is combined, so as to realize frequency compensation function and achieve high accuracy clock synchronization requirement.

Description

technical field [0001] The present invention relates to a system in the technical field of network information transmission and a synchronization method thereof, in particular to an IEEE 1588 precise clock synchronization protocol system without follow-up messages and a synchronization method thereof. Background technique [0002] In recent years, due to its openness, mature technology, high transmission rate, wide application and low price, Ethernet has received more and more attention, and has a tendency to be further applied to industrial sites. However, because its MAC layer protocol adopts CSMA / CD, it has the defect of uncertain queuing delay, which makes it unable to be effectively used in industrial control. The "uncertainty" of response time (that is, poor real-time performance) and the "asynchrony" of each module in the system have become the bottlenecks that hinder the "one network to the end" of Ethernet technology. Among them: Some industrial sites require extre...

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H04L12/40H04L12/56H04L7/00
Inventor 许雄熊振华朱向阳盛鑫军丁懋卿
Owner SHANGHAI JIAO TONG UNIV
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