Parallel computing hardware structure based on separation and combination thought

Abstract

The invention provides a parallel computing hardware structure based on a separation and combination thought, which comprises a plurality of first parallel computing units, a plurality of second computing units, a task dispatcher used for controlling a plurality of the first parallel computing units and a plurality of the second parallel computing units, a global memory used for storing global data, a local memory for storing intermediate results computed by a plurality of the first parallel computing units and providing the intermediate results to a plurality of the second computing units after starting computation, and a data controller used for providing data for a plurality of the first parallel computing units and the task dispatcher. By adopting the hardware structure applied in parallel computing and provided by the embodiment of the invention, design thoughts such as dispatching, synchronizing and communicating can be effectively covered, so a designer can directly focus on the description of a computation part of an algorithm, thus reducing design complexity of a parallel circuit and shortening circuit design and realization time to a large degree.

Description

technical field [0001] The invention relates to the field of computer and electronic information technology, in particular to a parallel computing hardware structure based on the idea of ​​separation and combination. Background technique [0002] With the rapid increase of computational complexity and data scale, traditional serial processing CPUs are no longer able to handle large-scale complex applications, so how to efficiently solve computational problems has become very important. Utilizing the high degree of parallelism of hardware circuits to accelerate algorithm implementation is an effective way to solve this kind of problems. At the same time, the flexible storage control of hardware circuits makes storage capacity and access speed reliable. However, how to design hardware circuits, make full use of the advantages of hardware circuits such as parallelism, and shield complex issues such as synchronization and scheduling, so as to speed up the time from research and ...

AI Technical Summary

Problems solved by technology

However, FPGA still needs to use hardware description language for design, and the design complexity is high

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