Parallel function simulation system for on-chip multi-core processor and method thereof

A multi-core processor and functional simulation technology, applied in software simulation/interpretation/simulation, program control devices, etc., can solve problems such as performance degradation and achieve high overall performance

Inactive Publication Date: 2010-07-14
SUZHOU INST FOR ADVANCED STUDY USTC
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0006] The purpose of the present invention is to provide a parallel function simulation system of an on-chip multi-core processor, which solves the problem

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  • Parallel function simulation system for on-chip multi-core processor and method thereof
  • Parallel function simulation system for on-chip multi-core processor and method thereof
  • Parallel function simulation system for on-chip multi-core processor and method thereof

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Embodiment Construction

[0045] The above solution will be further described below in conjunction with specific embodiments. It should be understood that these examples are used to illustrate the present invention and not to limit the scope of the present invention. The implementation conditions used in the examples can be further adjusted according to the conditions of specific manufacturers, and the implementation conditions not indicated are usually the conditions in routine experiments.

[0046] The practice and test of the parallel function simulation system of the embodiment

[0047] This embodiment implements a parallel function simulator on the basis of the serial simulator Multi2sim-2.1. During the whole implementation process, the server used is Sugon Tianyan EP850-GF minicomputer. The specific configuration of the minicomputer is as follows: 8 x 4-core AMD Opteron 8346 1.8G HE CPU, 32G DDR2ECC memory, 4*146G SAS hard disk. The operating system that the server runs is Linux Debain (X86-64)...

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Abstract

The invention discloses a parallel function simulation system for an on-chip multi-core processor and a method thereof. The system comprises a system input module and a system output module, and is characterized in that: a simulation kernel module is arranged between the system input module and the system output module; the simulation kernel module receives working load information run on a target system and provided by the system input module; and the simulation kernel module dynamically establishes a multithread according to the type of working load to perform the parallelization processingof simulation working load and outputs a result through the system output module. In the invention, the problem of performance reduction caused due to the increment of the cores of the target system in a serial function simulation technique is solved. The system of the invention has a higher speed-up ratio and relatively high overall performance.

Description

technical field [0001] The invention belongs to the simulation field of processors of information processing systems, and in particular relates to a parallel function simulation system and method of on-chip multi-core processors. Background technique [0002] Computer simulation uses software to simulate the behavior of computer systems. Researchers can analyze the performance and behavior of new structures through simulation software without the need to build prototype systems, which greatly reduces the research cycle and cost. In the past ten years, the industry and academia have widely used simulation technology in the research and development of computer hardware and software architecture. With the advent of the multi-core era, simulation technology will become more and more important in the design process of multi-core processors. [0003] Currently, most multi-core emulators are serial emulators, and these emulators only run on one main thread. As the number of cores...

Claims

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Application Information

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IPC IPC(8): G06F9/455
Inventor 吴俊敏尹巍隋秀峰赵小雨唐轶轩朱小东
Owner SUZHOU INST FOR ADVANCED STUDY USTC
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