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Gating method of memory and circuit structure implementing same

A memory and gating technology, applied in the field of micro-nano electronics, which can solve problems such as crosstalk power consumption

Active Publication Date: 2010-04-14
SHANGHAI INST OF MICROSYSTEM & INFORMATION TECH CHINESE ACAD OF SCI
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  • Abstract
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Problems solved by technology

[0008] The technical problem to be solved by the present invention is to provide a memory gating method and a circuit structure for realizing the method, which are used to overcome the triode parasitic effect that occurs during the gating process when a diode is used as a gating tube in the memory, thereby enabling Address crosstalk and increased power consumption due to this parasitic effect

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  • Gating method of memory and circuit structure implementing same
  • Gating method of memory and circuit structure implementing same
  • Gating method of memory and circuit structure implementing same

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Embodiment Construction

[0059] The invention is described more fully below with reference to the drawings, which provide preferred embodiments but should not be considered limited to the embodiments set forth herein.

[0060] In the phase-change memory to realize the address selection process, the diode is used as the selection tube. The diode can be: a polycrystalline or single crystal diode, a Schottky diode, a gate-source (or gate-drain) connected field effect transistor, a gate-source (or gate-drain) connected MOSFET, a Zener diode, or Silicon-controlled diodes, P-I-N structure diodes, etc. Among them, the manufacturing process of this memory cell structure can be: firstly, on the substrate, use epitaxial technology to grow a layer of high-concentration N-type Si; secondly, use etching to make it into a word line; then deposit silicon dioxide, and Use chemical mechanical polishing (CMP) to achieve planarization; then epitaxially layer N-type Si; epitaxially layer P-type Si again; deposit a layer...

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Abstract

The invention discloses a gating method of a memory and a circuit structure implementing the method. The memory uses a diode as a gating device to apply operating pulse and pull-down of word line voltage to bit lines of memory cells to be operated when read-write operation is performed and apply a direct current voltage higher than the word line voltage to the bit lines of memory cells which are free from read-write operation and in the same word line with the memory cells to be operated, so that a leakage current which is generated due to parasitic triode effect is zero and crosstalk problem caused by the leakage current is radically solved on the circuit. The direct current voltage higher than the word line voltage is generated via a peripheral circuit.

Description

technical field [0001] The invention relates to a memory gating method, in particular to a memory gating method using a diode as a gating tube and a circuit structure for realizing the method. The invention belongs to the technical field of micro-nano electronics. Background technique [0002] Phase change memory technology is based on Ovshinsky's proposal in the late 1960s (Phys. Rev. Lett., 21, 1450-1453, 1968) and early 1970s (Appl. Phys. Lett., 18, 254-257, 1971) The idea that the phase change film can be applied to the phase change storage medium is established, and it is a storage device with low price and stable performance. Phase-change memory can be made on a silicon wafer substrate, and its key materials are recordable phase-change films, heating electrode materials, heat-insulating materials, and lead-out electrode materials. Including how to reduce device material and so on. The basic principle of phase change memory is to use electric pulse signal to act on t...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G11C8/08G11C5/00
Inventor 丁晟宋志棠
Owner SHANGHAI INST OF MICROSYSTEM & INFORMATION TECH CHINESE ACAD OF SCI
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