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Automatic synthesizing method of combinational logic circuit based on graph code

A combined logic circuit and automatic synthesis technology, applied in image coding, image data processing, instruments, etc.

Inactive Publication Date: 2011-01-19
WUHAN UNIV OF SCI & TECH
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005]Comprehensive analysis of the current representation methods of combinational logic circuits has the following shortcomings: First, many methods limit the diversity of circuit structures, and these methods can only generate some specific structures The second is that many methods have very complex mapping rules, and it takes a lot of computing time in the process of mapping from code to circuit

Method used

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  • Automatic synthesizing method of combinational logic circuit based on graph code
  • Automatic synthesizing method of combinational logic circuit based on graph code
  • Automatic synthesizing method of combinational logic circuit based on graph code

Examples

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Embodiment 1

[0083] Embodiment 1 An automatic synthesis method of a three-input-output combinational logic circuit based on "graph" coding, the automatic synthesis step flow of the combinational logic circuit is as follows figure 1 Shown:

[0084] The first step: use "directed graph" ("graph" for short) to represent the combinational logic circuit, "graph" G is recorded as (V, E), V is the set of vertices of "graph", E is the edge of "graph" collection. in:

[0085] The vertices of the "graph" are divided into input vertices, output vertices and intermediate vertices, and the input vertices, output vertices and intermediate vertices are respectively represented by V IN , V OUT and V MID express. During evolution, V MID Allow addition, deletion or modification; V IN , V OUT Additions, deletions or modifications are prohibited; V’ IN , V' OUT Represent the input and output terminals of the combinational logic circuit, V' MID Represents different types of logic gates in combinati...

Embodiment 2

[0137] Embodiment 2 An automatic synthesis method of a four-input-output combinational logic circuit based on "graph" coding, the automatic synthesis step flow of the combinational logic circuit is as follows figure 1 Shown:

[0138] The first step: the same as the first step in embodiment 1.

[0139] Step 2: Set as Image 6 The truth table of the target combinatorial logic circuit shown and the maximum number of cycles is 100.

[0140] Step 3: template combinatorial logic circuit such as image 3 As shown, it is a combinational logic unit composed of a logic gate with two inputs and one output, two input terminals and one output terminal; any individual in the population is a "graph" coding form of a combinational logic circuit, and the individual is combined in the template The logic circuit is based on random generation. The process of individual generation is: randomly adding new vertices to the template combinational logic circuit, the number and position of the new ...

Embodiment 3

[0173] Embodiment 3 An automatic synthesis method of a four-input and three-output combinational logic circuit based on "graph" coding, the automatic synthesis step flow of the combinational logic circuit is as follows figure 1 Shown:

[0174] The first step: the same as the first step in embodiment 1.

[0175] Step 2: Set as Figure 9 The truth table of the target combinational logic circuit and the maximum number of cycles shown is 500.

[0176] Step 3: template combinatorial logic circuit such as image 3 As shown, it is a combinational logic unit composed of a logic gate with two inputs and one output, two input terminals and one output terminal; any individual in the population is a "graph" coding form of a combinational logic circuit, and the individual is combined in the template The logic circuit is based on random generation. The process of individual generation is: randomly adding new vertices to the template combinational logic circuit, the number and position ...

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Abstract

The invention relates to an automatic synthesizing method of a combinational logic circuit based on 'graph' codes. The proposal is as follows: a 'directed graph' is used for representing a combinational logic circuit; a truth table and a maximum cycle index of the ombinational logic circuit are set; N individuals are generated randomly to form a population P, the performance of all the individualsin the population P are set; n individuals with high affinity are selected to form a temporary population PS which is cloned to form a clone population PC; the clone population is modified to form avariant population PM which is evaluated to select m individuals with high affinity so as to form a re-selected population PR; the individuals with low affinity in the population P are replaced to from a secondary new population PN, d new individuals are generated randomly to replace the individuals with low affinity in the secondary new population PN so as to form a new population PT; and the population PT is evaluated according to the evaluation method of population P, which is recycled until the maximum recycling index is reached. The method is characterized by automatic and high-efficientgeneration of any combinational logic circuit and high encoding efficiency.

Description

technical field [0001] The invention belongs to the field of combinatorial logic circuit design. Specifically, it relates to an automatic synthesis method of combinational logic circuits based on "graph" coding. Background technique [0002] A combinational logic circuit is a logic circuit in which the value of the output terminal is based only on the value of the current input terminal. The synthesis of traditional combinational logic circuits mainly depends on the designer's personal knowledge and related experience. But artificial design often can not get the optimal combinational logic circuit. [0003] With the rapid development of Evolutionary Hardware (EHW), a large number of artificial intelligence algorithms borrowed from biology have been successfully introduced into the field of automatic design of digital circuits. For example, the GA algorithm, as a pioneering algorithm to find the optimal solution or approximate optimal solution, has been applied in the desi...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06T9/00
Inventor 甘朝晖史纲尚涛蒋旻朱平平蒋恋华
Owner WUHAN UNIV OF SCI & TECH
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