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Buffer cell circuit for resisting single-particle transient state

A single-event transient and anti-single event technology, which is applied in the direction of logic circuit connection/interface layout, logic circuit coupling/interface using field effect transistors, etc., can solve the problems of high overhead of area and power consumption, and achieve area and power The effect of small loss, effective suppression of single-event transient pulse ability, and fast speed

Inactive Publication Date: 2009-06-03
BEIJING MXTRONICS CORP +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Triple-mode redundancy plus majority voting can completely eliminate the effects of single-event transients (or fault signals), but at a very high cost (>200%) in area and power
However, the cost of power consumption and area is unaffordable

Method used

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  • Buffer cell circuit for resisting single-particle transient state
  • Buffer cell circuit for resisting single-particle transient state
  • Buffer cell circuit for resisting single-particle transient state

Examples

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Embodiment Construction

[0015] The present invention will be further described below in conjunction with the accompanying drawings.

[0016] Such as figure 1 , figure 2 As shown, the anti-single event transient buffer unit circuit of the present invention is composed of a single event transient suppression buffer circuit 811 and a signal delay circuit 812 .

[0017] The signal delay circuit is composed of an inverter and a delay unit, which can generate a signal AN that is inverse to the input signal A, a delayed signal A~ that is in phase with the input signal A, and a delayed signal AN~ that is inverse to the input signal A. The length of the signal delay time TD depends on the function of the delay unit in the delay circuit. The delay generated by the inverter is much smaller than the delay of the delay unit, so its influence on the signal delay is ignored.

[0018] The present invention provides two single event transient suppression buffer circuits. One is an N-type single event transient su...

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PUM

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Abstract

The invention relates to a buffer cell circuit for resisting the single-particle transient state which mainly consists of a single-particle transient-suppression buffer circuit and a signal-delay circuit, wherein, the signal-delay circuit consists of an inverter and a delay unit, the single-particle transient-suppression buffer circuit is an N-shaped single-particle transient-suppression buffer circuit or a P-shaped single-particle transient-suppression buffer circuit. With the adoption of the buffer circuit of the invention, the single-particle transient pulse which is generated on an input signal and provided with a pulse width smaller than the delay time internally set in a buffer, is eliminated, and key signals such as a clock, a reset, data, and the like, are effectively protected. At the same time, the buffer also possesses the strong ability for resisting single-particle transient state. In addition, The design for a circuit resisting single-particle is reinforced by adopting the buffer cell circuit for resisting the single-particle transient state, so that the area caused by the reinforcement of single-particle resistance and the power consumption are remarkably reduced compared with the common reinforcing methods, such as the triple modular redundancy, and the like.

Description

technical field [0001] The invention relates to a buffer unit circuit, in particular to a buffer unit circuit capable of eliminating and suppressing single-event transient pulses. Background technique [0002] Radiation produced by high-energy protons or high-energy neutrons hitting atomic nuclei and heavy nuclear particles in cosmic rays can cause circuit state changes, such as transient pulses in combinatorial logic, bit flips in memory-like cells, etc. This effect is a single particle The result of the action is often called a single event effect. Single event effects can be divided into single event upset (SEU), recoverable single event latch (SEL), single event transient (SET) and other single event soft errors, and also include single event burn (SEB), single event Hard errors such as particle gate breakdown (SEGR), unrecoverable single event latch-up (SEL), etc. [0003] The most sensitive part to the single event effect in the early integrated circuits is the stora...

Claims

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Application Information

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IPC IPC(8): H03K19/0185
Inventor 边强岳素格
Owner BEIJING MXTRONICS CORP
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