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Low-voltage difference linear voltage stabilizer without off-chip compensation capacitor

A technology of low-dropout linearity and capacitor compensation, which is applied in the direction of instruments, electric variable adjustment, control/regulation systems, etc., can solve problems such as poor precision and achieve high-precision results

Inactive Publication Date: 2009-02-18
FUDAN UNIV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

But because of the two-stage structure used, the accuracy that can be achieved is very poor

Method used

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  • Low-voltage difference linear voltage stabilizer without off-chip compensation capacitor
  • Low-voltage difference linear voltage stabilizer without off-chip compensation capacitor
  • Low-voltage difference linear voltage stabilizer without off-chip compensation capacitor

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Embodiment Construction

[0018] The low-dropout linear voltage regulator without off-chip compensation capacitor of the present invention will be further described below in conjunction with the accompanying drawings.

[0019] The block diagram of LDO without off-chip compensation capacitor proposed by the present invention is as follows: figure 1 As shown, the first-stage amplifier (1) and the second-stage amplifier (2) constitute the error amplifier; the power PMOS transistor (3) is connected in series with the two-stage error amplifier, and its size is larger than that of a power transistor with the same load current in general much smaller; the input voltage V in It is connected with the source of the power PMOS transistor (3), and is used as the power supply of the error amplifier (1, 2) at the same time; the resistor divider network (4) is used to form negative feedback; in addition, two compensation capacitors (5, 6 ), wherein the first compensation capacitor (5) is connected between the output...

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Abstract

The invention provides a novel low dropout linear regulator without off-chip compensation capacitance, which is composed of a two-level error comparator, a power PMOS tube, two capacitors for frequency compensation and a first-level transconductance feedback circuit. The low dropout linear regulator can realize the stability in the full load current range by adopting the arrangement of frequency compensation network and the small-sized power tube; meanwhile, the linear regulator has extreme high precision due to the adoption of a two-level error amplifier; therefore, the linear regulator is quite suitable for being used under full system-on-chip (SoC) condition and has good applying prospect.

Description

technical field [0001] The invention belongs to the technical field of integrated circuits, and in particular relates to a novel low-dropout linear voltage regulator without an off-chip compensation capacitor. Background technique [0002] Today, low-dropout linear regulators (LDOs) that do not require off-chip compensation are receiving more and more attention [1-3]. The research on this type of LDO is mainly for the application in System on Chip (SoC). The main purpose of the research is to develop a performance that is comparable to LDOs using off-chip compensation capacitors. These properties include: high accuracy (ie: small input voltage regulation rate and output current regulation rate), small output voltage variation when the load changes instantaneously, small quiescent current under no-load conditions, and strong output current capability. [0003] Prior to this, literature [1], [2] proposed an LDO that does not require an off-chip compensation capacitor based o...

Claims

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Application Information

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IPC IPC(8): G05F1/56
Inventor 马海峰周锋
Owner FUDAN UNIV
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