Semiconductor device

A semiconductor and conductivity-type technology, applied in the direction of semiconductor devices, transistors, electric solid-state devices, etc., can solve problems such as difficult device integration, unstable threshold voltage of NMOSFET and PMOSFET, terminals formed on one surface, etc., and achieve the goal of reducing on-resistance Effect

Inactive Publication Date: 2008-03-05
SANYO ELECTRIC CO LTD
View PDF1 Cites 3 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0006] However, in the semiconductor device in which the above-mentioned NMOSFET, PMOSFET, and bipolar transistor are combined, the sources of the NMOSFET and the PMOSFET are connected to the base of the bipolar transistor, so there is a defect that the threshold voltages of the NMOSFET and the PMOSFET are unstable.
Therefore, there is a problem that the operation of the semiconductor device is unstable.
In addition, in the wiring structure, since all terminals cannot be formed on one surface, there is a problem that it is difficult to integrate with other devices

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Semiconductor device
  • Semiconductor device
  • Semiconductor device

Examples

Experimental program
Comparison scheme
Effect test

no. 1 approach

[0084] FIG. 1 is a circuit diagram of a semiconductor device according to a first embodiment of the present invention. FIG. 2 is a cross-sectional view of the semiconductor device of the first embodiment shown in FIG. 1 . 3 is an electrode arrangement diagram of the semiconductor device of the first embodiment shown in FIG. 1 . 4 is an electrode arrangement diagram when the semiconductor devices of the first embodiment shown in FIG. 1 are arranged in an array. First, the configuration of a semiconductor device according to a first embodiment of the present invention will be described with reference to FIGS. 1 to 4 .

[0085] The semiconductor device 1 of the first embodiment includes an NMOSFET 11 , a PMOSFET 12 , and a pnp bipolar transistor 13 as shown in FIG. 1 . In addition, NMOSFET11 is an example of the "first conductivity type first field effect transistor" of this invention, and PMOSFET12 is an example of "second conductivity type second field effect transistor" of t...

no. 2 approach

[0100] 7 is a cross-sectional view of a semiconductor device according to a second embodiment of the present invention. Referring to FIG. 7 , a description will be given of a semiconductor device in which the surface of the semiconductor substrate and the upper portion of the gate electrode are silicided in this second embodiment, which is different from the first embodiment described above.

[0101] In the semiconductor device of the second embodiment, as shown in FIG. 7, p + source region 27, p + Type gate electrode 35, p + Drain region 28, n-type base layer 26, p + Emitter layer 32, n + Drain region 29, n + Type gate electrode 36, n + source region 30 and p + The surface of the collector layer 31 is silicided to form metal silicide films 41a to 41g. In this way, the n-type base layer 26, p + source region 27, p + Drain region 28, n + Drain region 29, n + Source region 30, p + collector layer 31 and p + The surface of each impurity region of the emitter layer 32...

no. 3 approach

[0113] 16 is a cross-sectional view of a semiconductor device according to a third embodiment of the present invention. Referring to FIG. 16 , in this third embodiment, unlike the above-described second embodiment, n well 22 and p well 23 are formed in deep n well 51 (deep n well: DNW). As a result, the diffusion current to the p-type silicon substrate 21 in the collector current of the pnp-type bipolar transistor 13 can be suppressed, so that the current can be collected more effectively in the p-type silicon substrate 21. + collector layer 31 . As a result, the on-resistance of the pnp-type bipolar transistor 1 can be reduced. In addition, the n well 51 is an example of the "second well region" in the present invention.

[0114] In addition, other effects of the third embodiment are the same as those of the second embodiment described above.

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

PUM

No PUM Login to view more

Abstract

A semiconductor device has an inverter and a bipolar transistor. The inverter has: a NMOSFET and a PMOSFET comprising source electrodes, drain electrodes and grid electrodes, wherein the drain electrode regions are connected mutually and the grid electrodes are connected mutually. The bipolar transistor comprises a collector, a base and a emitter. The base is input the output of the inverter. The invention provides a semiconductor device which is resistant to the high voltage and has a low conductive resistance and a short cut-off time and a reliable operation.

Description

technical field [0001] The present invention relates to semiconductor devices. Background technique [0002] Conventional semiconductor devices mainly include current-driven transistors such as bipolar transistors and insulated gate field effect transistors (MOSFETs). [0003] The biggest advantage of bipolar transistors is that the on-resistance can be suppressed to be very low through conductivity modulation, but there are defects in poor control performance and high-speed disconnection. On the other hand, MOSFETs have the advantages of good controllability of voltage driving and high-speed turn-off, but have the disadvantage of increasing the on-resistance when the withstand voltage is increased. [0004] In addition, the insulated gate bipolar transistor (Insulated Gate Bipolar Transistor: IGBT) used after 1980 is a bipolar transistor controlled by a MOS gate, and has a p-type collector on the n-type drain layer side of the vertical power MOSFET. The structure of the e...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

Application Information

Patent Timeline
no application Login to view more
Patent Type & Authority Applications(China)
IPC IPC(8): H03K17/041H03K17/567H03K17/60H01L27/06
Inventor 米田阳树藤原英明
Owner SANYO ELECTRIC CO LTD
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Try Eureka
PatSnap group products

Browse by: Latest US Patents, China's latest patents, Technical Efficacy Thesaurus, Application Domain, Technology Topic.

© 2024 PatSnap. All rights reserved.Legal|Privacy policy|Modern Slavery Act Transparency Statement|Sitemap