Correlator circuit for global positioning system

Abstract

The invention discloses a circuit for a correlator of a global positioning system, which comprises a 6-bit full adder, a register set, a latch set and a clock generating circuit. The 6-bit full adder is connected with the register set, which is connected with the latch set. The first clock signal from the clock generating circuit is taken as the switch controlling signal of the register set, the second clock signal from the clock generating circuit is taken as the reset signal of the register set and the switch controlling signal of the latch set. Between the 6-bit full adder and the latch set, a 14-bit counter is provided. The function control end C of the 14-bit counter is connected with the carry-over signal end of the highest place of the 6-bit full adder; the 14 output ends of the 14-bit counter are correspondingly connected with the 7th to 20th input end of the latch set. The first clock signal from the clock generating circuit is also used as the clock signal of the 14-bit counter, the second clock signal from the clock generating circuit forms a third clock signal after delaying by the delay unit, and the third clock signal is used as the reset signal of the 14-bit counter.

Description

technical field [0001] The invention relates to a global positioning system correlator circuit, in particular to a global positioning system correlator circuit used as a chip circuit. Background technique [0002] At the receiving end of GPS spread spectrum communication, it is necessary to use the correlator to accumulate the correlation output of the pseudo-random code and the local code, so as to obtain the maximum value of the correlation operation, so as to realize the tracking and capture of the received signal. [0003] In existing designs, full adders are usually used to form correlators, but considering that GPS receivers work in multiple channels, there is a large demand for correlators, so it is necessary to reduce the area and size of correlators in the design. Power consumption, improve its integration. Here, the frequency of the GPS receiving signal is set to 20Mb / s, and general digital circuits can meet this requirement, so the speed is not included in the op...

AI Technical Summary

Problems solved by technology

[0004] Ordinary correlator circuits directly send 21-bit data to the full adder for calculation. The layout is always relatively simple, but with the increase of the number of data bits, the number of transistors used in the circuit will increase sharply, which will increase the chip area and generate a lot of damage. Large power consumption, which affects the performance of the GPS receiver chip

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