Method of fabricating recess channel in semiconductor device

Abstract

A method of fabricating a recess channel in a semiconductor device includes forming a hard mask pattern over a substrate, etching the substrate using the hard mask pattern to form first recesses, forming an insulation layer over the hard mask pattern and the first recesses, etching the insulation layer to form spacers on sidewalls of the first recesses and on sidewalls of the hard mask pattern, etching the substrate below the first recesses to form second recesses using a sulfur fluoride containing gas mixture, and removing the hard mask pattern and the spacers.

Description

[0001] Cross reference to related applications [0002] This application claims priority from Korean Patent Application No. 10-2006-0038786 filed on Apr. 28, 2006, which is hereby incorporated by reference in its entirety. technical field [0003] The present invention relates to a method of manufacturing a semiconductor device, more particularly, a method of manufacturing a recessed gate. Background technique [0004] In recent years, the pattern size of semiconductor devices of DRAM has gradually decreased, and the recessed gate process was introduced to overcome the short channel effect caused by the reduced channel length during gate formation in the cell region and to improve refresh characteristics, that is, the channel can be The region is recessed to a certain depth to form a recessed gate with a longer channel length. Typically, the recessed gate process includes forming a recessed channel by etching the recessed channel region of the substrate, and forming a gate ...

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Therefore, the characteristics of the resulting product will be defective and will reduce the reproducibility

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