Looking for breakthrough ideas for innovation challenges? Try Patsnap Eureka!

Semiconductor device and method of manufacturing the same

A manufacturing method and semiconductor technology, applied in semiconductor/solid-state device manufacturing, semiconductor devices, transistors, etc., can solve problems such as PN junction breakdown, failure to obtain target source-drain withstand voltage, etc., and achieve low on-resistance Effect

Inactive Publication Date: 2007-08-29
SANYO ELECTRIC CO LTD
View PDF1 Cites 0 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] However, in the above-mentioned high withstand voltage MOS transistor, although a gate withstand voltage of about 200V can be obtained, there is a problem that electric field concentration occurs at the end of the LOCOS film on the drain side. The PN junction breaks down, so the target source-drain withstand voltage cannot be obtained

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Semiconductor device and method of manufacturing the same
  • Semiconductor device and method of manufacturing the same
  • Semiconductor device and method of manufacturing the same

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0033] The structure of the high withstand voltage MOS transistor according to the embodiment of the present invention will be described with reference to FIG. 10 . An N-type epitaxial silicon layer 2 is epitaxially grown on a P-type single crystal silicon substrate 1 , and an N+ type buried silicon layer 3 is formed on the interface between the single crystal silicon substrate 1 and the epitaxial silicon layer 2 . A LOCOS film 4 having a film thickness of about 1000 nm is formed on the epitaxial silicon layer 2 , and a gate electrode 5 is formed on the LOCOS film 4 . On the surface of the epitaxial silicon layer 2 on the left side of the LOCOS film 4, a P-type first drift layer (P+L) 6 is formed, and on the surface of the epitaxial silicon layer 2 on the right side of the LOCOS film, the gate electrode 5 is sandwiched in between. A P+ type source layer (PSD) 7 is disposed facing the first drift layer 6 . An N+ layer (NSD) 8 for setting the epitaxial silicon layer 2 to the so...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The invention provides a high voltage MOS transistor having a high gate breakdown voltage and a high source / drain breakdown voltage and having a low on-resistance. A gate electrode (5) is formed on an epitaxial silicon layer (2) with a LOCOS film (4) being interposed therebetween. A P-type first drift layer (6) is formed on the left side of the LOCOS film (4), and a P + -type source layer (7) is disposed on the surface of the epitaxial silicon layer (2) on the right side of the LOCOS film (4), being opposed to the first drift layer (6) over the gate electrode (5). A P-type second drift layer (9) is formed by being diffused in the epitaxial silicon layer (2) deeper than the first drift layer (6), extending from under the first drift layer (6) to under the left side of the LOCOS film (4). A recess (R) is formed in a bottom portion of the second drift layer (9) under the left end of the LOCOS film (4).

Description

technical field [0001] The invention relates to a semiconductor device and a manufacturing method thereof, in particular to a structure of a high withstand voltage MOS transistor and a manufacturing method thereof. Background technique [0002] High withstand voltage MOS transistors have high source-drain withstand voltage or high gate withstand voltage, and are widely used in various drivers such as LCD drivers and power supply circuits. In recent years, high withstand voltage transistors are desired to have both high source-drain withstand voltage and high gate withstand voltage. Therefore, the LOCOS film (Local Oxidation of Silicon), which is a field insulating film, was originally used as a gate insulating film to increase the gate withstand voltage, and by providing a low-concentration drain layer, the source-drain withstand voltage was realized. improve. [0003] Patent Document 1 already describes a high withstand voltage MOS transistor. [0004] Patent Document 1:...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Applications(China)
IPC IPC(8): H01L29/78H01L21/336
CPCH01L29/7835H01L29/086H01L29/0878H01L29/0886H01L29/402H01L29/66659H01L29/7816
Inventor 田中秀治菊地修一中谷清史
Owner SANYO ELECTRIC CO LTD
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Patsnap Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Patsnap Eureka Blog
Learn More
PatSnap group products