Method for implementing viterbi decoding path measurement normalization

A Viterbi decoding and path metric technology, which is applied in the field of Viterbi decoding path metric normalization, can solve the problems of complex comparators, high cost, and increased hardware resource usage, so as to simplify logic and reduce additional requirements , The effect of parallel high-speed decoding

Active Publication Date: 2009-09-23
SANECHIPS TECH CO LTD
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Problems solved by technology

In order to complete such a function, a very large number of very complex comparators are required
Such a bunch of comparators will greatly increase the amount of resources occupied by the hardware and reduce the maximum clock frequency of the circuit. This method is very costly in the design of fast parallel decoding.

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  • Method for implementing viterbi decoding path measurement normalization
  • Method for implementing viterbi decoding path measurement normalization
  • Method for implementing viterbi decoding path measurement normalization

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Embodiment Construction

[0021] The specific embodiment of the method of the present invention is described in detail below in conjunction with accompanying drawing:

[0022] The method of the present invention is based on the following rules:

[0023] (1) During the Viterbi decoding process, the distance between any two paths must be less than (n-1)×w, where n is the convolution depth of the encoder, and w is the maximum range of all received symbols of a codeword (for example, for 1 / 3 code rate, 8bit quantized received symbols, then w=3×2 8 ).

[0024] (2) When calculating the accumulated path metrics, all path metrics are converted into positive numbers.

[0025] In the calculation process, the branch path metrics are represented by complement codes, and the range of the representation is (the symbol’s metric bit width is m): —2 m-1 ~2 m-1 -1, if adding 2 to all branch path metrics m-1 , all the branch path metrics are converted into positive values, so that when calculating the path metrics, ...

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Abstract

The invention discloses a method for realizing Viterbi decoding path metric normalization, which comprises the following steps: setting the bit width of the storage path metric value storage unit to be 2 bits larger than the maximum distance between any two paths; performing Viterbi decoding, When calculating and accumulating path metric values, all path metric values ​​are converted into positive numbers, and the comparison and selection unit performs comparison and selection according to unsigned numbers; the monitor monitors the highest two bits of the path metric value when the path metric is stored, if the two If the value of the bit is equal to 2'b10, then in this round of path metric storage process, the highest two bits are subtracted by 1 before storage; otherwise, it is stored directly. The method of the present invention solves the path metric normalization problem in the path metric storage stage, reduces the extra demand for calculation and comparison units, simplifies the logic of the calculation unit and comparison selection unit; thus keeps the calculation and comparison units simple High speed, capable of parallel high-speed decoding.

Description

technical field [0001] The present invention relates to various fields using Viterbi decoding, in particular to the design of decoding circuits in all Viterbi encoding and decoding mobile communication systems such as 2G, 3G, and Wimax, and in particular to a method for realizing Viterbi decoding path metric return Unified method. Background technique [0002] Convolutional error-correcting codes are widely used in various communication fields. figure 1 It is the core unit of convolutional error correction decoding. According to the received codeword, the core unit calculates the path metrics S0' and S1' from the two old state's path metrics S0 and S1 to the new state respectively, and selects the smaller one from the two path metrics One, as the path metric for the new state. The process mainly includes the following units: path metric calculation and accumulation unit, path metric comparison and selection unit, and path metric storage unit. [0003] In the above proces...

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H03M13/41H03M13/23
Inventor 田学红
Owner SANECHIPS TECH CO LTD
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