Storage apparatus comprising read-write cache and cache implementation method

Abstract

This invention discloses one read-write buffer storage device and the method of one storage device's read-write buffer to realize. This invention makes the reading buffer and the writing buffer separate, namely carries on the access control for reading buffer and writing buffer separately by the different processors, namely the reading buffer hangs directly under the main processor, thus enhances the processing efficiency of the main processor to the reading buffer, and the main processor can support the big memory space, thus guarantees the reading buffer have large capacity, then, improves the processing efficiency of the main processor to the reading buffer; The writing buffer hangs under the I / O processor, the I / O processor's necessary battery supply circuit realizes to supply the writing buffer power continually, and the writing buffer doesn't need to share the limited memory space the I / O processor can support with the reading buffer, thus the processing efficiency of the main processor to the writing buffer can be improved as a result of the writing buffer capacity enhancement.

Description

technical field [0001] The invention relates to cache technology, in particular to a storage device including a read-write cache and a method for realizing the read-write cache in the storage device. Background technique [0002] In storage devices, cache is an indispensable storage medium (usually one or more blocks of memory), which can accelerate the access speed of the main processor in the storage device to the disk group, thus greatly improving the overall performance of the storage device. s help. [0003] It should be noted that the physical location and media type of the cache in the storage device mentioned here are different from the internal cache of the CPU of the computer system. [0004] According to the type of access, cache can be divided into read cache and write cache. Wherein, for the storage device, the data in the write cache cannot be lost to avoid the loss of user data; while the data in the read cache is lost, the user data will not be lost. There...

AI Technical Summary

Problems solved by technology

[0015] 1) The read cache and write cache are both connected to the main processor through the I / O processor, that is, they are far away from the main processor. For the processing efficiency after the read and write hits, such as figure 1 The first scheme shown is lower;

[0016] 2) Usually, the memory space that the I / O processor can support (that is, the memory space that is continuously powered by the battery) is relatively limited in size, which is far smaller than the memory space that the main processor can support. The capacity of the read cache and write cache under the / O processor; the read and write efficiency of the read cache and write cache is directly related to its capacity

[0017] 3) In this solution, both the read cache and the write cache are continuously powered, but the read cache does not need continuous power supply, resulting in a waste of resources

[0018] It can be seen that the above figure 2 Although the cost is reduced in the scheme shown, since the read cache occupies part of the memory space continuously powered by the battery, the memory space continuously powered by the battery as the write cache is smaller, thus making the reading and writing of the read and write cache low processing efficiency

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