Real-time code and data protection via CPU transactional memory support

Abstract

A technique allows for memory bounds checking for dynamically generated code by using transactional memory support in a processor. The memory bounds checking includes creating output code, identifying read-only memory regions in the output code and creating a map that is provided to a security monitoring thread. The security monitoring thread executes as a transaction and determines if a transactional conflict occurs to the read-only memory region during parallel execution of a monitored thread in the output code.

Description

TECHNICAL FIELD[0001]Embodiments described herein generally relate to computer security and malware protection, and more particularly to techniques for using transactional memory to protect real-time code and data conversion.BACKGROUND ART[0002]Today, compilers, for example, Binary Translation (BT) compilers and Just-In-Time (JIT) converters may generate output code for execution on a machine or processor. Ordinarily, compilers or convertors take source code and create executable BT or JIT output. Compilers may statically compile source code into machine code for execution on the same machine or processor or may create byte code on a first machine or processor, wherein the bytecode is subsequently input to a JIT compiler, a dynamic compiler, on a second machine or processor. Compilers perform this conversion and may generate memory-maps for identifying instructions and identifying data. Further, these memory maps may identify modifiable and non-modifiable memory locations for code a...

AI Technical Summary

Problems solved by technology

However, unless protected, output code may become a target of an attack such as, for example, attack by malware or similar that exploits vulnerabilities in the generated output code.

However, these methods are not effective.

Memory paging and segmentation require expensive hypervisor or operating system (OS) operations to mark memory pages as read-only in page tables and / or in extended page tables, and for very dynamic type of code translation, the overhead of a hypervisor or OS can be very high.

However, if certain memory regions in these memory pages need to be changed later (for example, to optimize performance), it is impossible to change these memory pages without changing how the BT or JIT output code is generated.

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