Integrated circuit with breakdown voltage multiplier

Abstract

An apparatus and method for driving an output signal in a high speed integrated circuit. The apparatus and methods enable the output voltage swing from the driver to exceed the breakdown voltage of any individual element in the output driver. A high speed driver can utilize one or more transistors in a stacked configuration, such that the breakdown voltage of the entire stacked configuration is based on the number of transistors in the stack. The driver is configured to distribute the output voltage substantially equally among each of the stacked transistors, such that the driver is able to source an output voltage swing that is greater than the breakdown voltage of any individual transistor in the driver.

Description

CROSS-REFERENCES TO RELATED APPLICATIONS[0001]This application claims the benefit of U.S. Provisional Application No. 60 / 562,661, filed Apr. 15, 2004, entitled BREAKDOWN VOLTAGE MULTIPLIER; which is hereby incorporated herein by reference in its entirety.STATEMENT AS TO RIGHTS TO INVENTIONS MADE UNDER FEDERALLY SPONSORED RESEARCH OR DEVELOPMENT[0002]This invention was made with government support under grant N00014-01-1-0764 awarded by the Office of Naval Research. The government has certain rights in the invention.BACKGROUND OF THE DISCLOSURE[0003]The disclosure relates the field of electronic devices. More particularly, the disclosure relates to a high speed driver configuration that allows an output voltage swing to exceed the breakdown voltage of any individual transistor in the driver.[0004]Processors and associated applications have developed to a level that enable enormous amounts of information to be generated and utilized. The capability of processors and associated applica...

AI Technical Summary

Problems solved by technology

A communication system can have sufficient bandwidth allocated for distribution of vast amounts of information, but the rate that the information can be distribute across the communication system may be limited by the limitations of the communications hardware.

Although a reduction in the operating voltage can provide some benefits in the form of reduced power consumption, the combination of reduced operating voltage and reduced breakdown voltage can severely limit the applicability of integrated circuits implementing such high speed transistors.

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