Fan-out package structure including antenna

Abstract

The invention provides a semiconductor package assembly. The semiconductor package assembly includes a first semiconductor package including a first redistribution layer (RDL) structure having a first surface and a second surface opposite to the first substrate. The first RDL structure includes a plurality of first conductive traces close to the first surface of the first RDL structure. An antenna pattern is disposed close to the second surface of the first RDL structure. A first semiconductor die is disposed on the first surface of the first RDL structure and electrically coupled to the first RDL structure. A plurality of conductive structures is disposed on the first surface of the first RDL structure and electrically coupled to the first RDL structure. The plurality of conductive structures is spaced apart from the antenna pattern through the plurality of first conductive traces of the first RDL structure.

Description

CROSS REFERENCE TO RELATED APPLICATIONS[0001]This application is a Continuation-In-Part of pending U.S. patent application Ser. No. 15 / 130,994, filed on Apr. 17, 2016, entitled “FAN-OUT PACKAGE STRUCTURE INCLUDING ANTENNA”, which claims the benefit of U.S. Provisional Application No. 62 / 157,046 filed on May 5, 2015 and U.S. Provisional Application No. 62 / 256,218 filed on Nov. 17, 2015. And this application also claims the benefit of U.S. Provisional Application No. 62 / 321,237 filed on Apr. 12, 2016 and U.S. Provisional Application No. 62 / 335,093 filed on May 12, 2016 the entirety of each of the above-identified priority applications are incorporated by reference herein.BACKGROUND OF THE INVENTION[0002]Field of the Invention[0003]The present invention relates to a semiconductor package assembly, and in particular to a fan-out semiconductor package with an antenna integrated into a single redistribution layer (RDL) structure.[0004]Description of the Related Art[0005]In order to ensure...

AI Technical Summary

Benefits of technology

The patent text describes a semiconductor package assembly that includes a first semiconductor package with a first redistribution layer structure and an antenna pattern. The first semiconductor package is also coupled to a plurality of conductive structures that are spaced apart from the antenna pattern. Another embodiment of the semiconductor package assembly includes a first semiconductor package with an antenna pattern close to the second surface of the first redistribution layer structure, and a plurality of conductive structures that are electrically coupled to the first semiconductor package. The technical effect of the patent text is to provide a semiconductor package assembly that allows for efficient coupling of conductive structures to an antenna pattern without interfering with the performance of the antenna.

Problems solved by technology

As a result, it is difficult to reduce the size of the package.

Moreover, in this case, since the antenna component is typically mounted on the package by a surface mount technology (SMT) process, poor SMT process control may induce delamination between the antenna component and the underlying package.

As a result, reliability, yield, and throughput of the semiconductor package structure are reduced.

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