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Structure for encapsulating semiconductor

A packaging structure, semiconductor technology, applied in the direction of semiconductor devices, semiconductor/solid-state device components, electric solid-state devices, etc., can solve difficult structural strength problems and brightness problems, negative impact on packaging pass rate, structural deformation and distortion, etc.

Active Publication Date: 2006-04-19
HARVATEK CORPORATION
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  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] Please refer to Figure 1A to Figure 1C , for the existing LED packaging structure 1a, the substrate 10a is bonded to the LED chip 12a, and connected to the wire 14a and packaged with the packaging material 16a (may have multiple grooves), especially when facing assembly, the traditional The light-emitting diode packaging structure 1a faces relatively difficult problems of structural strength and brightness, such as structural deformation and distortion when cutting the substrate (which often occurs when the substrate is too thin), which will affect the accuracy in practical applications and also have a negative impact on the packaging yield. influences

Method used

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  • Structure for encapsulating semiconductor
  • Structure for encapsulating semiconductor
  • Structure for encapsulating semiconductor

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Embodiment Construction

[0043] Please refer to Figure 2A to Figure 2B , where the gap is W (the middle of the substrate 10) and the thickness is H, that is, H is proportional to W, when Figure 2A The thinner the thickness of the plate, the smaller the interval can be, that is Figure 2A The thickness of each layer is 1 / 2, such as Figure 2B When the stack structure, Figure 2B The interval between thin layers can be very small to achieve the purpose of reducing the interval and strengthening the board. Therefore, according to the above-mentioned relationship between H and W, the structure of stacked layers is not necessarily 1 / 2, and can be adjusted according to actual needs.

[0044] Please refer to Figure 3A to Figure 3B , Figure 4 , Figure 5A to Figure 5E , is an embodiment of the present invention, where Figure 3A and Figure 3B For single-sided stacking, Figure 4 It is double-sided laminated, Figure 5A to Figure 5E Be the embodiment that has outer frame device 17 ( Figure 5D a...

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Abstract

Related to encapsulating structure for semiconductor, the invention includes following parts: basis material of having positive and negative faces; semiconductor setup on the positive and negative faces of the basis material; outline border set made from opaque material on the basis material, and around the semiconductor; high molecular obsturator in use for filling up the outline border set, and capable of letting light source pass in or out of the obsturator. Advantages are: easy of setting procedures, low cost for adding devices, good mechanical strength of basis material; usable traditional encapsulation equipment, and high luminous brightness.

Description

technical field [0001] The present invention relates to a packaging structure for semiconductors or luminous bodies, in particular to a packaging structure that has the advantages of high strength and no external light interference during light transmission, is not easily deformed, and increases the qualification rate and quality of packaging. When the chip is packaged, it will be easy to meet the packaging requirements required by the electronic chip, and the structure is better than the existing substrate and the installation cost is low. The method of double-layer substrate is mainly used to improve the strength characteristics of the substrate and the outer frame device to prevent external light interference; and a more excellent packaging structure for optoelectronic semiconductors than the existing luminous body packaging structure. Background technique [0002] In the packaging industry, semiconductor packaging attracts the most attention. The light-emitting diode (LE...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L23/31H01L33/00H01L31/18H01L33/48
CPCH01L2224/48091H01L2224/48247H01L2224/48257Y02P70/50H01L2924/00014
Inventor 汪秉龙庄峰辉洪基纹林川发
Owner HARVATEK CORPORATION
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