Semiconductor structure and forming method thereof

A semiconductor and gate structure technology, which is applied in semiconductor devices, semiconductor/solid-state device manufacturing, semiconductor/solid-state device components, etc., can solve the problems that the performance of fin field effect transistors needs to be improved, so as to reduce parasitic capacitance and improve performance Effect

Pending Publication Date: 2022-07-26
SEMICON MFG INT (SHANGHAI) CORP +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0004] However, the performance of fin field effect transistors formed by existing technologies needs to be improved

Method used

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  • Semiconductor structure and forming method thereof
  • Semiconductor structure and forming method thereof
  • Semiconductor structure and forming method thereof

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Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0042] It should be noted that "surface" and "upper" in this specification are used to describe the relative positional relationship in space, and are not limited to whether they are in direct contact.

[0043] First, the reasons for the poor performance of the existing semiconductor structure are described in detail with reference to the accompanying drawings. Figure 1 to Figure 4 It is a structural schematic diagram of each step of a method for forming a conventional semiconductor structure.

[0044] Please refer to figure 1 , a substrate 100 is provided, the substrate has a fin 110 and a dummy gate structure 120 , the dummy gate structure 120 spans the fin 110 , and the dummy gate structure 120 is located on the fin 110 Part of the top surface and sidewall surface; forming sidewall spacers 130 on the sidewall surfaces of the dummy gate structure 120 ; forming source and drain doped regions 140 in the fins 110 on both sides of the dummy gate structure 120 and the sidewall ...

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PUM

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Abstract

The invention discloses a semiconductor structure and a forming method thereof. The method comprises the steps of providing a substrate; forming a gate structure and a source-drain plug on the substrate, wherein a sacrificial side wall is arranged between the gate structure and the source-drain plug; forming a source-drain contact hole in the source-drain plug; forming a gate contact hole in the gate structure; after the source-drain contact hole and the gate contact hole are formed, the sacrificial side wall is removed, and a cavity is formed between the gate structure and the source-drain plug; and forming a dielectric layer on the gate structure and the source-drain plug, wherein the dielectric layer seals the top of the cavity. The semiconductor structure formed by the method is good in performance.

Description

technical field [0001] The present invention relates to the technical field of semiconductor manufacturing, and in particular, to a semiconductor structure and a method for forming the same. Background technique [0002] With the continuous development of semiconductor technology, the improvement of integrated circuit performance is mainly achieved by continuously reducing the size of integrated circuit devices to increase its speed. Currently, the semiconductor industry has progressed to the nanotechnology process node due to the demands of high device density, high performance and low cost, and the fabrication of semiconductor devices is limited by various physical limits. [0003] As CMOS devices continue to shrink in size, challenges from fabrication and design have prompted the development of 3D designs such as fin field effect transistors (FinFETs). Compared with the existing planar transistors, FinFETs are advanced semiconductor devices for 20nm and below process nod...

Claims

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Application Information

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IPC IPC(8): H01L29/78H01L29/423H01L21/336
CPCH01L29/42356H01L29/66803H01L29/785H01L21/7682H01L21/76834H01L23/485H01L23/5226H01L23/5222H01L23/53295H01L29/66545H01L29/6653H01L29/41791H01L29/41775H01L21/76897H01L29/401
Inventor 邓武锋
Owner SEMICON MFG INT (SHANGHAI) CORP
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