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IGBT with varied trench oxide thickness region

A region and trench technology, applied in semiconductor devices, electrical components, circuits, etc., can solve the problems of inability to adjust the conduction dI/dt, collection of holes, poor thermal performance, etc., to improve process control and yield, The effect of reducing the number of defects and improving the uniformity of electrical properties

Pending Publication Date: 2022-07-22
DYNEX SEMICONDUCTOR +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0008] During turn-off, the on-dI / dt cannot be adjusted and holes cannot be efficiently collected from the dummy region (the region that is not used for conduction in the on state and accommodates the passive trench); and
[0009] ·Poor thermal performance

Method used

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  • IGBT with varied trench oxide thickness region
  • IGBT with varied trench oxide thickness region
  • IGBT with varied trench oxide thickness region

Examples

Experimental program
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Effect test

Embodiment Construction

[0140] figure 1 A cross-sectional view of a semiconductor device 100 according to an embodiment of the present disclosure is shown. In this embodiment, device 100 includes an n-type voltage sustaining region or n-base (or drift region) 108 over a collector p+ layer (substrate) 104 . The collector p+ layer 104 is, for example, a p-type diffusion on the backside, which provides holes for bipolar conduction in the on state. The n buffer layer 106 is located between the p+ collector layer 104 and the n base region 108 . The back metal contact 102 is located below the collector p+ layer 104 .

[0141] Device 100 includes two active trenches 124 extending from the surface of n+ contact region (or first contact region) 116 down into n-base 108 . The active trench 124 acts as a trench gate along which a MOS channel is formed by applying a positive voltage in the on state. Above n-base region 108 and adjacent to active trench 124, a p-well or p-body (or body region) 112 is provided...

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PUM

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Abstract

Described herein is a gated bipolar semiconductor device comprising a collector region (104) of a first conductivity type, a drift region (106, 108) of a second conductivity type over the collector region, a body region (110) of the first conductivity type over the drift region, a body region (112) of the second conductivity type over the drift region, at least one first contact region of a second conductivity type over the body region and having a higher doping concentration than the body region, at least one second contact region (116) of the first conductivity type laterally adjacent to the at least one first contact region, the at least one second contact region has a higher doping concentration than the body region, at least one active trench (124) extending from the surface into the drift region wherein the at least one first contact region adjoins the at least one active trench such that, in use, a channel region is formed along the at least one active trench and within the body region, and at least two auxiliary trenches (118) extending from the surface into the drift region. The at least two auxiliary trenches each include an insulating layer (122) along the vertical sidewalls and the bottom surface. A thickness of the insulating layer along two vertical sidewalls of the at least two auxiliary trenches is less than 1500 A. The body region of the first conductivity type and the body region of the second conductivity type are both at least located between two adjacent auxiliary trenches. Possibly, the device further includes a transmitter trench (336) located between the two active trenches (124) and recessed from the top surface.

Description

technical field [0001] The present disclosure relates to a semiconductor device having a thin oxide layer on auxiliary trench sidewalls and an n-well layer and a p-well layer between adjacent auxiliary trenches. Background technique [0002] Since power semiconductor devices can operate in both on and off states, power semiconductor devices are often used as switches. In the on state, the device can conduct high currents, so there is a need to reduce conduction losses. In the off state, the device can withstand the maximum system voltage with little or no current flow. [0003] Insulated gate bipolar transistors (IGBTs) have the combined advantages of metal oxide semiconductor (MOS) gate drives and high current density in bipolar transistors. Bipolar transistors utilize conduction of majority and minority carriers. This means that bipolar transistors have a high density of charge carriers. This high level of charge reduces on-state losses (V CE(sat) ), but will increase...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L29/739H01L29/06H01L29/40H01L29/417H01L29/423H01L21/331
CPCH01L29/66348H01L29/7397H01L29/0696H01L29/401H01L29/417H01L29/42368H01L29/0615H01L29/407
Inventor 路德-金·恩格文森伊恩·德文尼
Owner DYNEX SEMICONDUCTOR
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