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Semiconductor structure and forming method thereof

A semiconductor and gate structure technology, which is applied in the field of semiconductor structure and its formation, can solve the problems of semiconductor structure performance to be improved, and achieve the effect of improving reliability and production yield, improving production yield, and improving integrity

Pending Publication Date: 2022-05-27
SEMICON MFG INT (SHANGHAI) CORP +1
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0005] However, the performance of current semiconductor structures still needs to be improved

Method used

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  • Semiconductor structure and forming method thereof
  • Semiconductor structure and forming method thereof
  • Semiconductor structure and forming method thereof

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Embodiment Construction

[0016] It can be known from the background art that the performance of the current semiconductor structure needs to be improved. The reason why the performance of the semiconductor structure needs to be improved is now analyzed in combination with a method for forming a semiconductor structure. Figure 1 to Figure 10 It is a schematic structural diagram corresponding to each step in a method for forming a semiconductor structure.

[0017] refer to figure 1 , a substrate 10 is provided, a dummy gate structure 20 is formed on the substrate 10 , and source and drain doped regions 11 are formed in the substrate 10 on both sides of the dummy gate structure 20 .

[0018] refer to Figure 2 to Figure 4 , forming a spacer stack 30 on the sidewall of the dummy gate structure 20 .

[0019] Specifically, the steps of forming the sidewall stack 30 include:

[0020] like figure 2 As shown, a first spacer film 34 is formed on the top and sidewalls of the dummy gate structure 20 and th...

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Abstract

The invention discloses a semiconductor structure and a forming method thereof. The forming method comprises the steps of providing a substrate, a gate structure, a side wall located on the side wall of the gate structure, a source-drain doped region, a bottom dielectric layer and a source-drain contact layer; removing the side wall to form a gap; forming a protective layer covering the bottom and the side wall of the gap in a shape-preserving manner; and forming a top dielectric layer on the bottom dielectric layer, wherein the top dielectric layer seals the gap to form an air gap. According to the embodiment of the invention, after the substrate is provided, the side walls are removed to form the gap, the bottom and the side walls of the gap are covered with the protective layer in a shape-preserving manner, and then the top dielectric layer for sealing the gap is formed, so that the air gap and the protective layer are correspondingly of an integrated structure, and the protection effect of the protective layer on the bottom and the side walls of the gap is improved; the damage probability of the film layer structures (such as the gate structure and the substrate) at the bottom and the side wall of the gap is reduced, the integrity of the film layer structures at the bottom and the side wall of the gap is correspondingly improved, and then the reliability and the production yield of the semiconductor structure are improved.

Description

technical field [0001] Embodiments of the present invention relate to the field of semiconductor manufacturing, and in particular, to a semiconductor structure and a method for forming the same. Background technique [0002] With the continuous development of integrated circuit manufacturing technology, people's requirements for the integration and performance of integrated circuits are becoming higher and higher. In order to improve the integration level and reduce the cost, the critical dimensions of the components are becoming smaller, and the circuit density inside the integrated circuit is increasing. This development makes the wafer surface unable to provide enough area to make the required interconnection lines. [0003] In order to meet the requirements of interconnect lines after the critical dimension has been shrunk, the current conduction between different metal layers or the metal layers and the substrate is achieved through an interconnect structure. The inter...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L29/78H01L29/06H01L21/336
CPCH01L29/785H01L29/0649H01L29/0684H01L29/66795H01L29/66545H01L29/66553
Inventor 金吉松
Owner SEMICON MFG INT (SHANGHAI) CORP
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