Cache data processing method and device and electronic equipment

A technology for caching data and a processing method, applied in the fields of caching data processing methods, devices and electronic equipment, can solve the problems of cache access conflicts, cache sources cannot be parallelized at the same time, affecting memory access speed, etc., so as to reduce conflicts and reduce access functions. The effect of improving memory access speed

Active Publication Date: 2022-05-24
PHYTIUM TECH CO LTD
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

However, limited by the number of cache access ports, all sources that need to access the cache cannot be parallelized at the same time, which will cause cache access conflicts and affect the memory access speed

Method used

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  • Cache data processing method and device and electronic equipment
  • Cache data processing method and device and electronic equipment
  • Cache data processing method and device and electronic equipment

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Embodiment Construction

[0045] In order to make the purpose, technical solutions and advantages of the present disclosure clearer, the present disclosure will be further described in detail below with reference to the accompanying drawings. The described embodiments should not be regarded as limitations of the present disclosure, and those skilled in the art will not All other embodiments obtained under the premise of creative work fall within the protection scope of the present disclosure.

[0046] In the following description, reference is made to "some embodiments" which describe a subset of all possible embodiments, but it is understood that "some embodiments" can be the same or a different subset of all possible embodiments, and Can be combined with each other without conflict.

[0047] In the following description, the term "first\second" involved is only to distinguish similar objects, and does not represent a specific ordering of objects. It is understood that "first\second" can be mutually ...

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Abstract

The invention relates to the technical field of computer data processing, in particular to a cache data processing method and device and electronic device.The cache data processing method comprises the steps that first data read from a memory is obtained and stored in a first buffer; and when it is determined that the access state of a cache memory is a set state, updating the first data in the first buffer to the cache memory. According to the cache data processing method provided by the embodiment of the invention, the first data read from the memory is not instantly stored in the cache, but the data updating operation is carried out when the cache memory is in the access state, for example, the cache memory is in the idle state. When the number of access request sources of the cache is large, only the access of the request is processed, so that the parallelism of the cache actually needing to be accessed is the highest, conflicts can be reduced, and the access speed is increased; and processing the newly added updated access selection machine, so that the access power consumption can be reduced.

Description

technical field [0001] The present disclosure relates to the technical field of computer data processing, and in particular, to a cache data processing method, device, and electronic device. Background technique [0002] When the central processing unit (CPU) wants to read a piece of data, it first looks up from the CPU cache. If it is found, it is read immediately and sent to the CPU for processing; if it is not found, it is read from the memory with a relatively slow reading rate. And send it to the CPU for processing, and at the same time call the data block where the data is located into the CPU cache, so that the entire block of data can be read from the CPU cache in the future, and there is no need to read the calling memory. [0003] The above read mechanism makes the hit rate of the CPU read cache very high (most hit rates can reach about 90%), which means that 90% of the data to be read by the CPU next time is in the CPU cache, and only about 10% needs to be Read f...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F12/0811G06F12/0877
CPCG06F12/0811G06F12/0877Y02D10/00
Inventor 郭丽丽高军薛洪波丁哲曹程成
Owner PHYTIUM TECH CO LTD
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