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High-level modeling-based hybrid launch queue design implementation method and system

A launch queue and implementation method technology, applied in the field of microprocessor design, can solve problems such as difficult design and implementation, long verification and debugging cycle, and difficulty in meeting requirements, so as to reduce complexity and design implementation cost, and adapt to diversified designs effect of demand

Pending Publication Date: 2022-05-20
NAT UNIV OF DEFENSE TECH
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  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

In order to achieve precise tuning, the current design of the launch queue is mainly implemented based on the register transfer level, but the design and implementation are difficult, the verification and debugging cycle is long, and it is difficult to meet the market demand for rapid updates
The mixed emission queue method varies according to the mixed method and granularity, and the traditional design method is difficult to meet the requirements

Method used

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  • High-level modeling-based hybrid launch queue design implementation method and system
  • High-level modeling-based hybrid launch queue design implementation method and system
  • High-level modeling-based hybrid launch queue design implementation method and system

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Embodiment Construction

[0023] Such as figure 1 As shown, in this embodiment, the method for designing and implementing a mixed transmission queue based on high-level modeling includes:

[0024] 1) Determine the instruction types and operand types that the designed hybrid issue queue needs to support; establish a life cycle model of instructions from entering to out of the issue queue; establish a hybrid issue queue model that is suitable for multiple instruction types and operand types;

[0025] 2) Modeling and implementing the aforementioned hybrid emission queue model using a high-level language, and generating a register-transfer-level design model;

[0026] 3) Use the back-end physical design tool to evaluate the register transfer level design model; judge whether the evaluation result meets expectations, if it meets expectations, end and exit, otherwise give optimization suggestions based on the evaluation results, and return to step 2) to continue optimization.

[0027] In this embodiment, w...

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Abstract

The invention discloses a high-level modeling-based hybrid launch queue design implementation method and system. The method comprises the following steps of: determining an instruction type and an operand type which need to be supported by a designed hybrid launch queue; establishing a life cycle model of the instruction from entering to flowing out of the transmitting queue; establishing a hybrid transmission queue model adapted to various instruction types and operand types; performing modeling and implementation by using a high-level language aiming at the hybrid transmission queue model, and generating a register transfer level design model; evaluating the register transfer level design model by using a back-end physical design tool; and judging whether the evaluation result meets the expectation or not, if so, ending and quitting, otherwise, giving an optimization suggestion according to the evaluation result, and returning to carry out continuous optimization. According to the method, the requirement of the hybrid transmission queue design can be effectively supported, and the complexity and the design implementation cost of the hybrid transmission queue design are effectively reduced by performing high-level modeling and description on the hybrid transmission queue.

Description

technical field [0001] The invention relates to microprocessor design technology, in particular to a method and system for designing and implementing a hybrid launch queue based on high-level modeling, which is used for the design of command launch queues in microprocessor processor cores. Background technique [0002] Microprocessor design technology plays an important role in improving the performance, reliability and availability of microprocessors. Microprocessor design technology includes steps such as front-end logic design and back-end physical design. The former determines the function, performance, area, power consumption, etc. of the microprocessor, and the latter performs physical layout design, device selection, and timing on the basis of the former. , area, power consumption, etc. are optimized and physically implemented. The launch queue is an important component used to implement instruction out-of-order launch in current out-of-order superscalar microprocess...

Claims

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Application Information

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IPC IPC(8): G06F30/337G06F30/327G06F115/10
CPCG06F30/337G06F30/327G06F2115/10Y02D10/00
Inventor 雷国庆邓全郭维郭辉王俊辉孙彩霞倪晓强郑重黄立波隋兵才王永文
Owner NAT UNIV OF DEFENSE TECH
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