Method for suppressing common-mode voltage in SVPWM (Space Vector Pulse Width Modulation) modulation of three-phase two-level inverter

Abstract

The invention discloses a method for inhibiting common-mode voltage in SVPWM (Space Vector Pulse Width Modulation) modulation of a three-phase two-level inverter, which comprises the following steps of: obtaining expected d-q shafting voltage Udref and Uqref through a current loop, and obtaining an included angle theta between a d axis and an alpha axis through a motor position or a speed sensor; according to the Udref, the Uqref and the theta, calculating to obtain an expected reference voltage vector amplitude Usref and an included angle between the Usref and the alpha axis, judging a sector S where the Usref is located according to the included angle, and looking up a table according to the sector S to obtain three unit vectors Ux, Uy and Uz which need to be used and have a fixed action sequence; according to the volt-second balance principle, the action time Tx, Ty and Tz of the unit vectors Ux, Uy and Uz is obtained through calculation, and Tult is calculated; the part of Ty is eliminated, the part of Tmin is eliminated, Ty is made to be equal to Tmin, and Tmin is dead time; and SVPWM output is carried out by adopting a decreasing symmetric five-section mode. Under the condition that hardware cost is not increased, the problem that + / -Udc / 2 peaks appear in common-mode voltage in PWM modulation can be effectively suppressed, and the problem that a motor bearing is damaged by higher harmonics of three-phase current is obviously solved.

Description

technical field [0001] The invention relates to the field of space vector pulse width modulation (SVPWM), in particular to a method for suppressing common-mode voltage in SVPWM modulation of a three-phase two-level inverter. Background technique [0002] At present, three-phase two-level inverters combined with space vector pulse width modulation (SVPWM) have been widely used in industries, automobiles, aerospace and other fields, but due to the existence of zero vector and dead zone, there will be a large common mode Voltage, this phenomenon will cause overvoltage on the motor bearings, which has a great impact on the life of the motor. Existing schemes for suppressing common-mode voltage mainly include: 1. Use a passive filter to suppress common-mode current, which will increase hardware cost and volume weight; 2. Improve the SVPWM modulation method, but the amount of calculation is large, and the bus voltage uses The rate is too low, and the effect of the dead zone canno...

AI Technical Summary

Problems solved by technology

[0002] At present, three-phase two-level inverters combined with space vector pulse width modulation (SVPWM) have been widely used in industries, automobiles, aerospace and other fields, but due to the existence of zero vector and dead zone, there will be a large common mode Voltage, this phenomenon will cause overvoltage on the motor bearings, which has a great impact on the life of the motor

Existing schemes for suppressing common-mode voltage mainly include: 1. Use a passive filter to suppress common-mode current, which will increase hardware cost and volume weight; 2. Improve the SVPWM modulation method, but the amount of calculation is large, and the bus voltage uses The rate is too low, and the effect of the dead zone cannot be eliminated

Images