Communication system of SRIO high-speed bus based on FPGA

Abstract

The invention provides a communication system of an SRIO high-speed bus based on an FPGA, and the system specifically comprises a register and an interrupt control module which are used for configuring a transaction type and data information, and giving a feedback signal; the SRIO source end module is used for analyzing a transaction type and data information, initiating a corresponding transaction, generating NREAD interruption and state change of a read-write register, generating a transaction request, and receiving a response sent by a request receiving end of the NREAD transaction and a DOORBELL transaction; the SRIO destination end module is used for receiving the transaction request of the SRIO source end module, sending response data and generating DOORBELL register state change and DOORBELL interruption; the Serial RapidIO Gen2 Endpoint IP module is used for realizing an SRIO (Serial RapidIO) logic layer protocol, an SRIO physical layer protocol and an SRIO transport layer protocol of the SRIO source end module and the SRIO destination end module; and the DMA module is used for accessing the data. According to the processing scheme, the speed of the SRIO serial data bus is exerted to the maximum extent, and the real-time performance of the system is improved.

Description

technical field [0001] The present application relates to the field of communication technology, in particular to a communication system based on FPGA-based SRIO high-speed bus. Background technique [0002] As an important branch of RapidIO, the high-speed serial interface SRIO is a high-reliability, high-performance, packet-based next-generation high-speed interconnection technology proposed for embedded system development. It was approved by the International Organization for Standardization and the International Electrotechnical Association in 2004. The ISO / IECDIS 18372 standard can achieve the lowest pin count, support complex scalable topologies, and multi-point transmission. It is very suitable for the transmission of large-scale data between chips and boards. SRIO high-speed serial bus is more and more used in inter-chip or inter-board communication due to its low power consumption, pin-saving, high bandwidth, and high stability. For example, it is widely used in se...

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Problems solved by technology

SRIO high-speed serial bus is more and more used in inter-chip or inter-board communication due to its low power consumption, pin-saving, high bandwidth, and high stability. For example, it is widely used in serial backplanes, DSP It is connected to the serial RapidIO interface of the relevant serial data plane, but the SRIO protocol supports a maximum of 256B data in a single packet, and cannot directly access the data. , access and other operations will greatly limit the data transmission rate and real-time performance of the SRIO bus

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