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Cyclic redundancy check method and device

A cyclic redundancy check and algorithm module technology, applied in the field of data verification, can solve problems such as complexity and reduce overall system performance, and achieve the effect of ensuring design performance

Pending Publication Date: 2022-03-01
BYZORO NETWORK LTD
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Problems solved by technology

The prior art method is relatively complicated and requires additional consumption of some resources, and in the implementation mode of digital programmable chip FPGA chip, it will also reduce the overall system performance

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  • Cyclic redundancy check method and device

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Embodiment Construction

[0026] In order to enable those skilled in the art to better understand the technical solutions in this specification, the technical solutions in the embodiments of this specification will be clearly and completely described below in conjunction with the drawings in the embodiments of this specification. Obviously, the described The embodiments are only some of the embodiments in this specification, not all of them. Based on the embodiments in this specification, all other embodiments obtained by persons of ordinary skill in the art without creative efforts shall fall within the protection scope of this specification.

[0027] Such as figure 1 As shown, a kind of cyclic redundancy check method is provided in some embodiments of this specification, and this method comprises the following steps:

[0028] S102. Obtain the data message to be processed, obtain valid bytes and invalid bytes of the data message to be processed, and fill the invalid byte with 0;

[0029] S104, setti...

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Abstract

The invention discloses a cyclic redundancy check method and device. The method comprises the following steps: acquiring a data message to be processed; obtaining valid bytes and invalid bytes of the data message to be processed, and filling the invalid bytes as 0; a CRC32D512 algorithm module is arranged; the effective bytes are input into the CRC32D512 algorithm module; a first CRC result is obtained through calculation based on the CRC32D512 algorithm module; an inverse derivation crc32roll back module is arranged; the first CRC result is input into the anti-derivation crc32roll back module, and the first CRC result is input into the anti-derivation crc32roll back module; based on the reverse derivation crc32roll back module, a second CRC result is obtained through reverse derivation; and based on the byte number of the effective bytes and the second CRC result, selecting to obtain a third CRC result. On the premise that an algorithm module does not need to be additionally added, large-bit-width data CRC (cyclic redundancy check) calculation is achieved, system resources are not additionally occupied, the overall system performance is not affected, and implementation is easy.

Description

technical field [0001] This specification relates to the field of data verification, in particular to a method and device for cyclic redundancy verification. Background technique [0002] In the process of data transmission, no matter how perfect the design of the transmission system is, there will always be errors, which may cause one or more frames transmitted on the link to be destroyed (bit errors occur, 0 becomes 1, or 1 becomes 0), so that the receiver receives wrong data. In order to improve the accuracy of the data received by the receiver as much as possible, it is necessary to perform error detection on the data before the receiver receives the data, and the receiver will actually accept the data only when the detection result is correct. There are many detection methods, including CRC (Cyclic Redundancy Check). [0003] Cyclic Redundancy Check CRC (Cyclic Redundancy Check) is a channel coding technology that generates a short fixed-digit check code based on data...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H04L1/00
CPCH04L1/004H04L1/0061
Inventor 李西昆樊震
Owner BYZORO NETWORK LTD
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