High-speed multi-channel adjustable dot frequency liquid crystal device driving method based on FPGA (Field Programmable Gate Array)

Abstract

The invention discloses a high-speed multi-channel adjustable dot frequency liquid crystal device driving method based on an FPGA (Field Programmable Gate Array), is applied to the technical field of liquid crystal device driving and aims at the problem of low refresh rate in the prior art. The method disclosed by the invention is realized based on an FPGA (Field Programmable Gate Array), and a multi-channel adjustable sine wave is generated through a shift synthesis method and is used for driving a liquid crystal device; and the algorithm is simple and easy to implement, can be used in cooperation with any DAC, is high in operation speed, supports multi-channel parallel independent amplitude modulation, does not add any additional circuit component, is low in cost, and has extremely high practical value.

Description

technical field [0001] The invention belongs to the technical field of liquid crystal device driving, and in particular relates to a liquid crystal device driving technology. Background technique [0002] The working principle of the liquid crystal device is as follows: the greater the applied voltage, the greater the inclination angle of the liquid crystal molecules (closer to the homeotropic alignment state), and the greater the intensity of the corresponding transmitted light; the smaller the applied voltage, the smaller the inclination angle of the liquid crystal molecules (the closer close to the surface-aligned state), the corresponding transmitted light intensity is smaller. That is, by controlling the magnitude of the applied voltage, the liquid crystal can be used to realize the beam modulation function, so it is necessary to modulate the amplitude of the voltage loaded on the liquid crystal device. [0003] The liquid crystal device is driven by an AC voltage sign...

AI Technical Summary

Problems solved by technology

The first method is to connect a potentiometer in series with each DAC channel, and adjust the potentiometer to realize the amplitude adjustment of the sine wave. The circuit is complicated and the application cost is high; the second method is to adjust the reference voltage of the DAC to achieve the purpose of adjusting the amplitude of the sine wave, but the DAC used needs to support real-time adjustment of the reference voltage, and at the same time, different channels of the same DAC cannot be independently Adjustment; the third method is to use the multiplier inside the FPGA to adjust the output signal amplitude by multiplying the voltage code, but the resources of the multiplier inside the FPGA are limited, and parallel calculations cannot be performed in multi-channel scenarios, resulting in calculation speed Slow, lowering the refresh rate of the entire system

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