A kind of array substrate and display panel

Abstract

The present application discloses an array substrate and a display panel. The common electrode layer on the array substrate includes a common electrode trunk and a plurality of common electrode branches. The pixel electrode layer includes a plurality of interconnected pixel electrode branches. The pixel electrode branch includes a branch main body and a plurality of common electrode branches. A branch end connected to the branch main body, the branch end includes a first side, a second side and a third side, the first side is arranged opposite to the common electrode trunk to form a first gap, and the second side and the third side are respectively connected to the corresponding The common electrode branches are arranged oppositely to form a second gap and a third gap; a fourth gap is formed between the branch body and the common electrode branch; among the first gap, the second gap and the third gap, at least one gap corresponds to a width value smaller than the fourth gap. The width of the gap. By narrowing the gap between the pixel electrode branch end and the common electrode, the electric field intensity at the branch end is increased, and the electric field interference between the scanning line and the data line pair between the branch end and the common electrode is reduced.

Description

technical field [0001] The present application relates to the field of display technology, and in particular to an array substrate and a display panel. Background technique [0002] With the development of display technology, the display mode of the display panel is also constantly changing, from the previous twisted nematic (TN) mode to the in-plane switching (IPS) mode. Poor vision caused by anisotropy. [0003] In the current IPS display mode, Trace Mura often appears, that is, after the end of the previous frame, the liquid crystal molecules cannot be deflected to the deflection state required by this frame in time, resulting in image retention, especially in the sub-pixel gate line. The edge of the pixel in the direction, because the electric field component in the horizontal direction formed between the common electrode and the pixel electrode is weaker than that in the middle of the pixel, and the electric field component in the vertical direction is stronger than th...

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Problems solved by technology

[0003] In the current IPS display mode, Trace Mura often appears, that is, after the end of the previous frame, the liquid crystal molecules cannot be deflected to the deflection state required by this frame in time, resulting in image retention, especially in the sub-pixel gate line. The edge of the pixel in the direction, because the electric field component in the horizontal direction formed between the common electrode and the pixel electrode is weaker than that in the middle of the pixel, and the electric field component in the vertical direction is stronger than that in the middle of the pixel, and the Trace Mura phenomenon is more likely to occur

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