A data migration system and method based on many-core system

Abstract

The invention relates to a data migration system and method based on a many-core system. In a many-core system, the CPU in the PE of the lower layer is connected to the SRAM in the PE of the upper layer through AHB; The SRAM performs read and write operations; the master / slave converter is set between the PE of the lower layer and the PE of the upper layer, and the slave interface of the master / slave converter is connected to the master interface of the CPU in the PE of the lower layer, and converted into a The master interface of the AHB protocol in the upper-layer PE is connected to the slave interface of the SRAM in the upper-layer PE through the AHB protocol, so as to control the SRAM in the upper-layer PE. The invention can perform inter-chip data migration with high performance and low energy consumption.

Description

technical field [0001] The invention relates to the field of data migration, in particular to a data migration system and method based on a many-core system. Background technique [0002] With the advancement of microelectronic semiconductor technology, more and more computing cores are integrated into the chip in order to meet higher and higher computing requirements. On the one hand, due to the high-density integration of the unit chip, the power consumption density on the chip area is also increasing, which in turn generates a large amount of heat, making the temperature of the core on the chip higher and higher, forming local hot spots, which may cause Chip burned. Furthermore, such as electromigration, gate oxide layer [0003] Breakdown, mechanical fatigue, etc. will cause the chip to fail and be scrapped. Therefore, in order to reduce the mean time to failure (Mean Time To Failure, MTTF) of the system, a multi-core embedded system with high reliability is required....

AI Technical Summary

Problems solved by technology

Although this method can achieve fault tolerance by reconfiguring redundant cores, it increases the area overhead.

And if the redundant core is broken again, another redundant core is needed to achieve fault tolerance, which will cause the chip area to double, and the redundant core will not be used at all if the core is not broken. , which also causes a waste of resources, which reduces the resource utilization of the entire multi-core system

Therefore, although the use of redundant cores can achieve the purpose of fault tolerance, the disadvantages are also very prominent.

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