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Narrow mesa insulated gate bipolar transistor device and forming method

A technology of bipolar transistors and insulated gates, which is applied in semiconductor devices, semiconductor/solid-state device manufacturing, electrical components, etc., can solve the problems of collector-induced barrier reduction, reduce hole concentration, eliminate CIBL effect, and enhance The effect of short-circuit resistance

Pending Publication Date: 2021-12-17
SIEN QINGDAO INTEGRATED CIRCUITS CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0006] In view of the shortcomings of the prior art described above, the object of the present invention is to provide a narrow mesa IGBT device and a forming method for solving the problem of the narrow mesa IGBT in the prior art. Collector induced barrier lowering (CIBL) problem in (IGBT) devices

Method used

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  • Narrow mesa insulated gate bipolar transistor device and forming method
  • Narrow mesa insulated gate bipolar transistor device and forming method
  • Narrow mesa insulated gate bipolar transistor device and forming method

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Embodiment 1

[0063] see Figure 1 to Figure 3 , this embodiment provides a narrow mesa insulated gate bipolar transistor device, which is characterized in that it includes:

[0064] a semiconductor substrate 100;

[0065] The gate trench structure 101 and the emitter trench structure 102 formed on the front surface of the semiconductor substrate 100 and arranged at intervals along the horizontal direction; the gate trench structure 101 and the emitter trench structure 102 are arranged in a direction are respectively arranged in pairs, and the paired gate trench structures 101 and the paired emitter trench structures 102 are arranged to overlap each other in the arrangement direction;

[0066] a well region 103 formed between the pair of emitter trench structures 102;

[0067] The emitter implantation region 104 formed between the paired gate trench structures 101 and between the paired emitter trench structures 102; between the paired emitter trench structures 102 In the region, the emi...

Embodiment 2

[0083] see Figure 4 to Figure 9 , the present embodiment provides a method for forming a narrow-mesa IGBT device, which is characterized in that it includes the following steps:

[0084] 1) providing a semiconductor substrate 100;

[0085] 2) Forming gate trench structures 101 and emitter trench structures 102 arranged at intervals along the horizontal direction on the front surface of the semiconductor substrate 100; the gate trench structures 101 and the emitter trench structures 102 are arranged The directions are respectively arranged in pairs, and the paired gate trench structures 101 and the paired emitter trench structures 102 are arranged to overlap each other in the arrangement direction;

[0086] 3) forming a well region 103 between the paired emitter trench structures 102;

[0087] 4) Form an emitter injection region 104 between the paired gate trench structures 101 and between the paired emitter trench structures 102; between the paired emitter trench structures...

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Abstract

The invention provides a narrow mesa insulated gate bipolar transistor device and a forming method thereof. The device comprises: a semiconductor substrate; a gate trench structure and an emitter trench structure, which are formed on the front surface of the semiconductor substrate and are arranged at intervals along the horizontal direction, wherein the gate trench structure and the emitter trench structure are arranged in pairs in the arrangement direction and are overlapped with each other in the arrangement direction; the well region formed between the paired emitter trench structures; and an emitter injection region formed between the gate trench structures and between the emitter trench structures, wherein in a region between the emitter trench structures, an emitter implant region is over the well region. According to the invention, a P-type doped region is not arranged in the active mesa region, and the P-type doped region and the N+ type doped region located above the P- type doped region are formed in the non-active mesa region, so that not only is electron injection enhanced by introducing the narrow mesa region to obtain relatively low on-resistance of the device obtained, but also the anti-short-circuit capability of the device is enhanced by reducing the hole concentration of the narrow mesa region, and the CIBL effect is eliminated.

Description

technical field [0001] The invention relates to the field of semiconductor integrated circuit manufacturing, in particular to a narrow mesa insulated gate bipolar transistor device and a forming method. Background technique [0002] In a power device composed of an insulated gate bipolar transistor (IGBT), the on-resistance (R on ) and breakdown voltage (BV) are important parameters to measure the switching performance of power devices. How to obtain a lower on-resistance while maintaining a higher breakdown voltage of the device is a research focus in the industry. [0003] At present, in order to effectively reduce the on-resistance of the IGBT, a narrow mesa device structure has been introduced into the trench gate IGBT device. In the above narrow mesa IGBT device, the width of the mesa between the trench gates is generally about twice the thickness of the inversion layer of the device, for example, 20-40 nm. The on-resistance of the device is reduced by enhancing elec...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L29/06H01L29/739H01L21/331
CPCH01L29/7398H01L29/7397H01L29/7396H01L29/66068H01L29/66348H01L29/6634H01L29/0684H01L29/407H01L29/0619H01L29/0839H01L29/0804H01L29/0649
Inventor 季明华林庆儒吴盈璁刘聪慧杨龙康王欢张汝京
Owner SIEN QINGDAO INTEGRATED CIRCUITS CO LTD
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