PCB, and manufacturing method and equipment thereof

Abstract

The invention discloses a PCB, and a manufacturing method and equipment thereof. The PCB comprises a signal via hole which is formed in the vertical direction, a first wire which passes through the interior of the signal via hole, and a second wire which is arranged in the horizontal direction and is located at the outer side of the signal via hole, wherein a first section of the first wire is located on a first surface layer of the PCB, a second section of the first wire is located inside the signal via hole, a third section of the first wire is located on an inner layer of the PCB, and the second wire is located on the inner layer of the PCB and is not overlapped with the first wire. According to the PCB, the third section of the first wire is located in the inner layer of the PCB, the second wire is further located in the inner layer of the PCB, the second wire and the first wire do not overlap, interference between the second wire and the first wire is reduced under the condition that the distance between the second wire and the signal via hole is not increased, and high-density design of the PCB is achieved.

Description

technical field [0001] The invention relates to the technical field of printed circuits, in particular to a PCB board and a manufacturing method and equipment thereof. Background technique [0002] With the increasing integration of chips, the current society has higher and higher requirements for the miniaturization and high density of electronic products. In order to achieve enough functions in a limited space, it is inevitable that there will be interference between power vias and signal traces due to layout restrictions. In order to reduce interference, it is necessary to maintain sufficient spacing between power vias and traces, which will cause It is more difficult to realize high-density PCB (Printed Circuit Board, printed circuit board) design. At the same time, the Phase / FET and high-voltage vias of the common Buck (step-down) circuit interfere with the surrounding wiring and vias, which often lead to probabilistic problems in the product system. Due to the unconve...

AI Technical Summary

Problems solved by technology

In order to achieve enough functions in a limited space, it is inevitable that there will be interference between power vias and signal traces due to layout restrictions. In order to reduce interference, it is necessary to maintain sufficient spacing between power vias and traces, which will cause It is more difficult to realize high-density PCB (Printed Circuit Board, printed circuit board) design

At the same time, the Phase / FET and high-voltage vias of the common Buck (step-down) circuit interfere with the surrounding wiring and vias, which often lead to probabilistic problems in the product system. Due to the unconventional recurrence of the problem, it exists in the test verification process. Risks that have not been verified or are not easily verified, resulting in product quality risks or increased difficulty in verification

[0003]The goal is usually to reduce the impact of interference by increasing the spacing between vias and traces or increasing the isolation resistance. However, the spacing between vias and traces The increase of PCB requires a larger layout space, which increases the difficulty of designing high-density PCB products, especially the current technology trend of high voltage and low current. When the voltage is getting higher and higher, the requirements for layout space are also increasing. At the same time This solution cannot completely eliminate the influence of interference; however, by adding isolated ground holes between via interference sources, since the isolated ground holes also require a certain layout space, the optimization of the layout space is not greatly improved. Affect the design and implementation of high-density PCB products

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