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Semiconductor structure and forming method of semiconductor structure

A technology of semiconductor and isolation structure, applied in semiconductor devices, semiconductor/solid-state device manufacturing, nanotechnology for information processing, etc., can solve the problem that the performance of fork nanosheets needs to be improved, and achieve the effect of uniform thickness and improved performance

Pending Publication Date: 2021-11-23
SEMICON MFG INT (SHANGHAI) CORP +1
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  • Abstract
  • Description
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Problems solved by technology

[0004] However, the performance of fork-shaped nanosheets needs to be improved

Method used

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  • Semiconductor structure and forming method of semiconductor structure
  • Semiconductor structure and forming method of semiconductor structure
  • Semiconductor structure and forming method of semiconductor structure

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Embodiment Construction

[0039] As mentioned in the background art, the performance of the existing fork-shaped nanosheets still needs to be improved. Now analyze and illustrate in conjunction with specific embodiment.

[0040] figure 1 It is a schematic cross-sectional structure diagram of a semiconductor structure in an embodiment.

[0041] Please refer to figure 1 , including: a substrate 100, the substrate 100 including a first region I, a second region II, and an isolation region III between the first region I and the second region II; The fin structure on the above, the fin structure includes the first nanowire 101 and several second nanowires 102 on the first nanowire 101; the isolation structure 104 on the isolation region III, the isolation structure 104 is respectively connected with The fin structures on the first region I and the second region II are in contact; the isolation layer 103 is located on the first region I and the second region II, and the isolation layer 103 is located on t...

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Abstract

The invention discloses a semiconductor structure and a forming method of the semiconductor structure. The structure comprises a substrate, an isolation structure located on the substrate, a first nanowire and a second nanowire which are located on the two sides of the isolation structure respectively, a first barrier layer located between the first nanowire and the isolation structure, and a second barrier layer located between the second nanowire and the isolation structure. The performance of the semiconductor structure is improved.

Description

technical field [0001] The invention relates to the field of semiconductor manufacturing, in particular to a semiconductor structure and a method for forming the semiconductor structure. Background technique [0002] The FinFET transistor architecture is the workhorse of today's semiconductor industry. However, as the device continues to shrink, when the channel length is small to a certain value, the fin field effect transistor structure cannot provide sufficient electrostatic control and sufficient driving current. Therefore, a nanosheet (Nanosheet) structure is introduced, namely Gate-All-Around (GAA for short), compared with fin field effect transistors, this GAA characteristic of nanosheets provides excellent channel control capabilities. At the same time, the excellent distribution of the channels in three dimensions enables the optimization of the effective driving current per unit area. [0003] As the journey to smaller track heights continues, further reductions ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L29/78H01L21/762H01L21/336B82Y40/00B82Y10/00
CPCH01L21/76227H01L29/785H01L29/66803B82Y10/00B82Y40/00
Inventor 张海洋王胜
Owner SEMICON MFG INT (SHANGHAI) CORP
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