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A high-speed and stable transmission system and method for asynchronous serial lvds

An asynchronous serial and transmission system technology, applied in the field of data transmission, can solve the problem of unstable sampling data at the receiving end, and achieve the effect of ensuring timing correctness and stability

Active Publication Date: 2022-07-12
BEIJING INST OF COMP TECH & APPL
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  • Abstract
  • Description
  • Claims
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Problems solved by technology

[0004] The technical problem to be solved in the present invention is: how to solve the problem of unstable sampling data at the receiving end in the LVDS high-speed transmission process, and propose a processing and implementation method for asynchronous serial LVDS high-speed stable transmission

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  • A high-speed and stable transmission system and method for asynchronous serial lvds

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Embodiment Construction

[0045] In order to make the purpose, content, and advantages of the present invention clearer, the specific embodiments of the present invention will be further described in detail below with reference to the accompanying drawings and embodiments.

[0046] like figure 1 As shown, an FPGA-based asynchronous serial LVDS high-speed and stable transmission system provided by the present invention includes a sending end and a receiving end;

[0047] The sender includes:

[0048] The data generation module is used to simulate the generation of the source data Data0 to be sent, and send it to the data buffer module;

[0049] The data verification module is used to verify the source data Data0, add a verification word, generate a verification value TX_crc and send it to the data buffer module;

[0050] The data buffer module is used to buffer and convert the source data Data0 and the transmission check value TX_crc to form a data stream Data0+TX_crc;

[0051] The data scrambling mo...

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Abstract

The invention relates to an asynchronous serial LVDS high-speed stable transmission system and method, and relates to the technical field of data transmission. The invention uses polynomial scramble operation on the data stream at the transmitting end to make the data more random, encodes the data stream with 8b / 10b to ensure the balance of 0 and 1 in the transmission process, and dynamically adjusts the delay and phase of the received data through the control word, The timing correctness of the received data can be ensured, thereby ensuring the stability of the sampling data at the receiving end, and the LVDS interface link speed realized by the asynchronous serial LVDS high-speed stable transmission system of the present invention is up to 1.25G / s.

Description

technical field [0001] The invention relates to the technical field of data transmission, in particular to an asynchronous serial LVDS high-speed stable transmission system and method. Background technique [0002] At present, in the main technology of asynchronous LVDS transmission based on FPGA, the transmitting end converts the data into serial, and then sends it through the LVDS interface. After receiving the serial data, the receiving end converts it into parallel data, and then undergoes a bit alignment operation to restore it. The original data from the sender. When the data speed on the LVDS interface is too high, the sampling data at the receiving end will be unstable. SUMMARY OF THE INVENTION [0003] (1) Technical problems to be solved [0004] The technical problem to be solved by the present invention is: how to solve the problem of unstable sampling data at the receiving end in the process of LVDS high-speed transmission, and proposes a processing and reali...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H04L1/00H04L1/18H04L12/02
CPCH04L1/0041H04L1/0061H04L1/0045H04L1/1867H04L1/1874H04L1/1829H04L12/02
Inventor 侯运通王飞沈月峰王吕大邱圣斌张红磊聂煜桐
Owner BEIJING INST OF COMP TECH & APPL
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