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3D memory device and manufacturing method thereof

A technology for a storage device and a manufacturing method, applied in the field of storage, can solve the problems of difficult etching, collapse of the stacked structure, and impact on the performance of 3D storage devices, saving process steps, improving production efficiency, and improving product yield and reliability. sexual effect

Active Publication Date: 2022-04-22
YANGTZE MEMORY TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

If the deep groove is a continuous and long groove, it is not only difficult to etch, but also may cause the collapse of the stacked structure due to the force problem, thus affecting the performance of the 3D memory device

Method used

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  • 3D memory device and manufacturing method thereof
  • 3D memory device and manufacturing method thereof
  • 3D memory device and manufacturing method thereof

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Embodiment Construction

[0028] Hereinafter, the present invention will be described in more detail with reference to the accompanying drawings. In the various figures, identical elements are indicated with similar reference numerals. For the sake of clarity, various parts in the drawings have not been drawn to scale. Also, some well-known parts may not be shown. For the sake of simplicity, the semiconductor structure obtained after several steps can be described in one figure.

[0029] It should be understood that when describing the structure of a device, when a layer or a region is referred to as being "on" or "over" another layer or another region, it may mean being directly on another layer or another region, or Other layers or regions are also included between it and another layer or another region. Also, if the device is turned over, the layer, region will be "below" or "beneath" the other layer, region.

[0030] If it is to describe the situation directly on another layer or another area, ...

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PUM

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Abstract

The present application discloses a 3D storage device and a manufacturing method thereof. The 3D storage device includes: a substrate; a stacked structure, including a plurality of first dielectric layers and a plurality of spacer layers alternately stacked on the substrate, and the stacked structure including at least a first storage block, a second storage block, and an isolation block located between the first storage block and the second storage block to electrically isolate the first storage block and the second storage block; The direction of the substrate extends to at least cut off the spacer layer on the top layer, wherein the spacer layer in each storage block is a gate conductor layer, and each spacer layer in the spacer block that is not penetrated by the insulating part is a second dielectric layer. The 3D memory device avoids the formation of continuous deep grooves, and penetrates through the top spacer layer in the isolation block through the insulating part, thereby cutting off the connection path between the first memory block and the top spacer layer in the second memory block, preventing the first The storage block and the second storage block are connected to each other.

Description

technical field [0001] The present invention relates to memory technology, and more particularly, to 3D memory devices and manufacturing methods thereof. Background technique [0002] The development direction of semiconductor technology is the reduction of feature size and the improvement of integration. For memory devices, the improvement of storage density is closely related to the progress of semiconductor manufacturing process. As the feature size of the semiconductor manufacturing process becomes smaller and smaller, the storage density of the memory device is also higher and higher. [0003] In order to further increase storage density, memory devices with a three-dimensional structure (ie, 3D memory devices) have been developed. The 3D storage device includes a plurality of storage units stacked along the vertical direction, the integration degree can be doubled on a unit area wafer, and the cost can be reduced. [0004] A 3D memory device has multiple memory cell...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L27/11565H01L27/1157H01L27/11582H10B43/10H10B43/27H10B43/35
CPCH10B43/10H10B43/35H10B43/27
Inventor 赵祥辉
Owner YANGTZE MEMORY TECH CO LTD
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