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Iterative solving method and device for interlayer coupling of multi-layer super-large-scale integrated circuit

A large-scale integrated circuit, iterative solution technology, applied in the field of integrated circuits, can solve the problems of long calculation time, increasing the number of non-zero elements of sparse matrix, and the complexity of sparse matrix solution.

Active Publication Date: 2021-06-18
北京智芯仿真科技有限公司
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  • Claims
  • Application Information

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Problems solved by technology

Since the method of moments only integrates for the interface, it will reduce a large number of grid units and unknown quantities. However, since the scale of integrated circuits ranges from nanometers to centimeters, directly solving the whole integrated circuit with the finite element method itself will cause problems. Huge sparse matrix, and due to the coupling of the finite element method and the method of moments, the formed coupling matrix is ​​a dense matrix at the interface, which greatly increases the number of non-zero elements of the entire sparse matrix and the complexity of the sparse matrix solution, making the calculation time still very long

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  • Iterative solving method and device for interlayer coupling of multi-layer super-large-scale integrated circuit
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  • Iterative solving method and device for interlayer coupling of multi-layer super-large-scale integrated circuit

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[0042] In order to make the objectives, technical solutions and advantages of the present invention clearer, the technical solutions in the embodiments of the present invention will be described in more detail below in conjunction with the drawings in the embodiments of the present invention.

[0043] It should be noted that: in the drawings, the same or similar symbols represent the same or similar elements or elements with the same or similar functions. The described embodiments are part of the embodiments of the present invention, but not all of the embodiments. In the case of no conflict, the embodiments in the present application and the features in the embodiments can be combined with each other. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without creative efforts fall within the protection scope of the present invention.

[0044] In describing the present invention, it is to be understood that...

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Abstract

The invention provides an iterative solution method and device for interlayer coupling of a multi-layer super-large-scale integrated circuit. The iterative solution method comprises the following steps: firstly, setting an initial action layer of an mth source layer as all layers of the integrated circuit; secondly, performing iteration on the mth source layer, calculating the influence Gml of the distributed current of the mth layer on the lth layer through a vector Green function in the iteration process, updating the source item of the lth layer, applying a two-dimensional finite element to the lth layer to calculate the field distribution of the lth layer so as to update the field and current distribution of the layer, and obtaining the variation dEml of the field of the layer compared with the previous iteration result, comparing the Gml with an effective influence value of a dynamic calculation vector Green function to determine a negligible layer, and further modifying an action layer range of the mth source layer; and repeatedly iterating the source layers until the change quantity of the field of the acted layer caused by the influence change of all the source layers is less than a specified threshold value, and ending the iteration. According to the invention, the complexity and occupied memory of the three-dimensional problem can be reduced under the condition that the calculation precision is not reduced.

Description

technical field [0001] The invention relates to the technical field of integrated circuits, in particular to a method and device for iteratively solving interlayer coupling of multilayer VLSI. Background technique [0002] When the integrated circuit is working, due to the transmission of high-speed signals on its multi-layer layout, a high-frequency alternating electromagnetic field will be formed. on a small semiconductor substrate. In order to achieve more functions, VLSI has dozens to hundreds of layers of structure, each layer structure is extremely complex, integrating millions or even tens of millions of transistors, and has a multi-scale structure, from the centimeter level to the latest state-of-the-art nanoscale. In order to ensure that the integrated circuit can work normally and realize the functions designed in advance, it is necessary to ensure the power integrity and signal integrity of the integrated circuit first. Accurate analysis of power integrity and ...

Claims

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Application Information

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IPC IPC(8): G06F30/3308G06T17/20
CPCG06T17/20G06F30/3308
Inventor 唐章宏邹军王芬汲亚飞黄承清
Owner 北京智芯仿真科技有限公司
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