Communication method and communication system of interconnected die and DSP/FPGA

Abstract

The invention relates to a communication method and a communication system of an interconnected die and a DSP / FPGA. According to the communication method of the interconnection die and the DSP / FPGA, a plurality of data interfaces are included, each data interface is provided with a different protocol conversion module, and data input conversion and data output conversion are included during communication of the data interfaces; during data input conversion, external data of the DSP / FPGA is converted into a unified data protocol format through a protocol conversion module and is transmitted to a die level network in the interconnected die for unified transmission of the data; during data output conversion, the internal data in the interconnection die is converted into different data protocol formats by the protocol conversion module according to the data property of the data, enters different data interfaces and is transmitted to the DSP / FPGA. According to the method, the external data and the internal data are mutually converted, so that each apparatus and device can be connected into the multi-die system in any form, the flexibility of the system is improved, and flexible assembly, rapid definition and rapid implementation of the system are facilitated.

Description

technical field [0001] The invention relates to a communication system with DSP / FPGA, in particular to a communication method and communication system between interconnected bare cores and DSP / FPGA. Background technique [0002] With the development of digital integrated circuits, system on chip (System on Chip, SoC, refers to the integration of multiple functional modules on the same silicon chip) has almost become a necessary solution to realize high-performance systems. Manufacturers continue to expand the SoC Scale to meet the needs of users for product performance. However, limited by processing technology and other factors, Moore's Law (that is, the law that the number of transistors that can be accommodated on an integrated circuit doubles every 24 months) is gradually failing, which makes it impossible to expand the scale of integrated circuits on a single silicon chip. Costs and development cycles become extremely high. [0003] In the future, integrated circuits ...

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Problems solved by technology

[0005] In order to solve the above problems, the present invention provides a communication method for interconnecting bare cores and DSP / FPGA. This method can overcome the defects of poor flexibility and poor reconfigurability of the above-mentioned traditional methods, and set multiple data interfaces by means of scalable high-speed interconnecting bare cores. Enables flexible assembly, fast definition and fast implementation of multi-die systems including DSP / FPGA

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