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Model continuity checking method

A continuity and model technology, applied in the direction of instrumentation, calculation, electrical digital data processing, etc., can solve the problems of high-order effects that are difficult to accurately describe, discontinuity, and increase in the number of iterations, so as to improve the efficiency of software development and avoid inspection steps Effect

Inactive Publication Date: 2021-04-13
北京华大九天科技股份有限公司
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Problems solved by technology

[0003] However, in the actual modeling work, due to the large number of device model parameters, the difficulty of accurately describing high-order effects, the correlation between the analytical formula and the bias voltage, or human modeling errors, the device analytical model may appear current (Current, I) or charge ( Charge, Q) is not continuous
If the model is discontinuous, convergence difficulties will occur in the subsequent process of solving the matrix, and the number of iterations will increase, which will affect the simulation speed of the circuit; it may also cause the matrix to be solved incorrectly or fail to converge, and eventually cause the simulation to fail to proceed normally.

Method used

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Embodiment Construction

[0039] The preferred embodiments of the present invention will be described below in conjunction with the accompanying drawings. It should be understood that the preferred embodiments described here are only used to illustrate and explain the present invention, and are not intended to limit the present invention.

[0040] In the embodiment of the present invention, because Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET) is a very important and commonly used device in integrated circuits, and the MOSFET model is relatively complex and representative, all of the The present invention is explained here by taking MOSFET as an example, but the method of the present invention is applicable to other device models, and is not limited to the MOSFET device model.

[0041] figure 1 It is a flow chart of the method for checking model continuity of the present invention, which will be referred to below figure 1 , the method for checking model continuity of the present invention...

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Abstract

The invention relates to a model continuity checking method, which comprises the following steps of: respectively checking the continuity of a model current and a model charge by using Verilog-A Compeller; performing model current and charge continuity check according to the circuit matrix numerical solution; and reporting inspection result information. According to the method for checking the continuity of the model, an analytical formula of the model is analyzed by utilizing Verilog-A Compiler, so that the continuity of a segmented bias part can be quickly checked; dynamically checking the current and charge values in the simulation process; quickly checking discontinuous bias points through dynamic checking, reporting discontinuous point information, providing insight for problem analysis for simulator developers, and improving software development efficiency. Static inspection is performed first and then dynamic inspection is performed so that excessive inspection steps can be avoided.

Description

technical field [0001] The invention relates to the technical field of integrated circuit design automation. In particular, it relates to a method for checking the continuity of device models in the simulation of integrated circuit design automation. Background technique [0002] The shrinking size of the semiconductor process makes the number of devices integrated on a chip more and more, which puts forward higher requirements on the speed and accuracy of the IC design automation (Electronic Design Automation, EDA) simulation software. Integrated circuit simulation software automatically completes the work of constructing device analytical models, establishing and solving matrix equations, sorting and outputting simulation results through computer programs, thereby providing visual numerical basis for integrated circuit design and verification. The device model realizes the simulation of real circuit devices through parameter extraction and fitting; the device model is not...

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F30/367
CPCG06F30/367
Inventor 张爱林裴云鹏吴大可周振亚
Owner 北京华大九天科技股份有限公司
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