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Clock network extraction method and device of integrated circuit and storage medium thereof

A clock network and integrated circuit technology, applied in CAD circuit design, electrical digital data processing, instruments, etc.

Pending Publication Date: 2021-01-15
BEIJING BAIRUI INTERNET TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] This application provides a clock network extraction method, device and storage medium of an integrated circuit. The clock network of an integrated circuit is extracted by using a reverse derivation method, which is convenient for design engineers to efficiently solve the technical problem of effective clock propagation in an integrated circuit

Method used

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  • Clock network extraction method and device of integrated circuit and storage medium thereof
  • Clock network extraction method and device of integrated circuit and storage medium thereof
  • Clock network extraction method and device of integrated circuit and storage medium thereof

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Embodiment Construction

[0017] The preferred embodiments of the present application will be described in detail below in conjunction with the accompanying drawings, so that the advantages and features of the present invention can be more easily understood by those skilled in the art, so as to define the protection scope of the present invention more clearly.

[0018] It should be noted that in this article, relationships such as first, second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply that there is a relationship between these actual operations. Any such actual relationship or sequence. Furthermore, the term "comprises", "comprising", or any other variation thereof is intended to cover a non-exclusive inclusion such that a process, method, article, or apparatus comprising a set of elements includes not only those elements, but also items not expressly listed. other elements, or also include elements inherent in ...

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Abstract

The invention discloses a clock network extraction method and device of an integrated circuit and a storage medium thereof, and belongs to the field of circuit design. The method mainly comprises thefollowing steps: determining a derivation starting point node of a clock network; and continuously and reversely deriving a previous node of the clock network to obtain a derivation process node of the clock network, and determining a derivation end node of the clock network. According to the invention, on the premise of not depending on an electronic design automation tool, a special starting point and a terminal point can be stripped clearly and accurately, the whole clock network architecture of any type can be further stripped, and the problem of backtracking is avoided, so that a design engineer can analyze and optimize the quality of the clock network conveniently, and the problem of clock effective propagation in an integrated circuit is efficiently solved.

Description

technical field [0001] The present application relates to the field of integrated circuit design, in particular to a method, device and storage medium for extracting a clock network of an integrated circuit. Background technique [0002] Digital integrated circuits rely on registers at all levels to store and process data streams under the command of one or more clock beats. Therefore, solving the clock network architecture for effective clock propagation becomes one of the key issues in the physical implementation of integrated circuits. . Clock network architectures commonly used in IC design methodologies in the prior art include three types: tree architecture, fishbone architecture, and mesh architecture. The automation tool builds from a user-supplied design constraints file that includes annotated clock sources. In a complex clock structure, the clock network is distributed throughout the entire design. The clock input port and the special protocol clock output port ...

Claims

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Application Information

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IPC IPC(8): G06F30/32G06F117/04
CPCG06F30/32G06F2117/04
Inventor 葛颖峰徐祎喆朱勇
Owner BEIJING BAIRUI INTERNET TECH CO LTD
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