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Memory scheduling method and device

A memory scheduling and memory space technology, applied in the computer field, can solve the problems of access data security threats, low memory access efficiency, etc., to reduce memory conflicts, ensure security and accuracy, and improve efficiency.

Inactive Publication Date: 2021-01-12
CAMBRICON TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

In related technologies, electronic devices often adopt multi-core designs in order to improve the performance and throughput of artificial intelligence processors. However, when each core of an artificial intelligence processor accesses memory, there will be access competition among the cores, resulting in the efficiency of each core accessing memory. Low, the security of access data is threatened

Method used

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Embodiment Construction

[0022] Various exemplary embodiments, features, and aspects of the present disclosure will be described in detail below with reference to the accompanying drawings. The same reference numbers in the figures indicate functionally identical or similar elements. While various aspects of the embodiments are shown in drawings, the drawings are not necessarily drawn to scale unless specifically indicated.

[0023] The word "exemplary" is used exclusively herein to mean "serving as an example, embodiment, or illustration." Any embodiment described herein as "exemplary" is not necessarily to be construed as superior or better than other embodiments.

[0024] In addition, in order to better illustrate the present disclosure, numerous specific details are given in the following specific implementation manners. It will be understood by those skilled in the art that the present disclosure may be practiced without some of the specific details. In some instances, methods, means, componen...

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Abstract

The invention relates to a memory scheduling method and device. The device comprises a control module, wherein the control module comprises an instruction cache sub-module, an instruction processing sub-module and a storage queue sub-module; the instruction caching sub-module is used for storing a calculation instruction associated with the artificial neural network operation; the instruction processing sub-module is used for analyzing the calculation instruction to obtain a plurality of operation instructions; the storage queue sub-module is used for storing an instruction queue, and the instruction queue comprises a plurality of operation instructions or calculation instructions to be executed according to the front-back sequence of the queue. By means of the method, the operation efficiency of related products during operation of the neural network model can be improved.

Description

technical field [0001] The present disclosure relates to the technical field of computers, and in particular to a memory scheduling method and device. Background technique [0002] Memory (Memory) is the place where programs and data are stored in the computer. It is a general-purpose processor such as a central processing unit (CPU, Central Processing Unit), and a general-purpose processor such as a GPU (Graphics Processing Unit, Graphics Processing Unit), IPU (Image Processor, Image Processing Unit) and other artificial intelligence processors, almost all programs in the computer run in the memory, so the performance of the memory has a great impact on the computer. In related technologies, electronic devices often adopt multi-core designs in order to improve the performance and throughput of artificial intelligence processors. However, when each core of an artificial intelligence processor accesses memory, there will be access competition among the cores, resulting in the...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F9/50
CPCG06F9/5016
Inventor 不公告发明人
Owner CAMBRICON TECH CO LTD
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