CPLD updating method, server and computer readable storage medium

An update method and server technology, applied in the computer field, can solve the problems that BMC cannot monitor CPLD, read information and display error reports, etc.

Inactive Publication Date: 2021-01-05
SUZHOU LANGCHAO INTELLIGENT TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] The purpose of the present invention is to provide a CPLD update method, server and computer-readable storage medium, to alleviate the technical problem that the BMC cannot monitor the CPLD when the power is updated, and when the power is updated, after locking the I / O, read through the I2C bus Technical problems with information display errors

Method used

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  • CPLD updating method, server and computer readable storage medium
  • CPLD updating method, server and computer readable storage medium
  • CPLD updating method, server and computer readable storage medium

Examples

Experimental program
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Effect test

Embodiment 1

[0037] In a possible implementation, a CPLD update method provided by the present invention, such as figure 1 As shown, the CPLD applied to the server, such as figure 2 As shown, the CPLD is connected to the BMC through the I2C bus;

[0038] The methods include:

[0039] S1: receiving a firmware update signal from the CPLD;

[0040] S2: CPLD sets the clock signal of the I2C bus to 0;

[0041] S3: receiving the firmware update completion signal of the CPLD;

[0042] S4: The CPLD releases the clock signal of the I2C bus to restore the clock signal to normal.

[0043] By setting the clock signal of the I2C bus to 0, the system does not access the CPLD system during the update, and the system will not report an error, thereby solving the technical problem of the system reporting an error when the power is continuously updated. After the update, set the clock line signal to normal, and return the signal to normal in time after the update, without affecting the normal operatio...

Embodiment 2

[0054] The present invention also provides a kind of server, comprises BMC and CPLD, and described CPLD connects described BMC through I2C bus line, as Figure 4as shown,

[0055] The CPLD includes:

[0056] The reading module 1 is used to receive the firmware update signal and the firmware update completion signal of the CPLD;

[0057] The clock module 2 is used to set the clock signal of the I2C bus to 0 by the CPLD when the reading module receives the firmware update signal of the CPLD; The clock signal of the bus is released, so that the clock signal returns to normal.

[0058] Optionally, the CPLD includes a flash memory, and the flash memory is connected to the BMC through a programming bus;

[0059] The flash memory is used to latch the I / O signal of the programming bus by the CPLD when receiving the firmware update signal of the CPLD; when receiving the firmware update completion signal of the CPLD, the CPLD resumes the I / O signal of the programming bus.

[0060] O...

Embodiment 3

[0062] Corresponding to the above method, an embodiment of the present invention also provides a computer-readable storage medium, the computer-readable storage medium stores machine-executable instructions, and when the computer-executable instructions are invoked and executed by a processor, the The computer-executable instructions cause the processor to perform the steps of the above-mentioned method.

[0063] It should be noted that like numerals and letters denote similar items in the following figures, therefore, once an item is defined in one figure, it does not require further definition and explanation in subsequent figures.

[0064] The apparatus provided by the embodiment of the present invention may be specific hardware on the device or software or firmware installed on the device. The implementation principles and technical effects of the devices provided by the embodiments of the present invention are the same as those of the aforementioned method embodiments. Fo...

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PUM

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Abstract

The invention provides a CPLD updating method, a server and a computer readable storage medium and belongs to the technical field of computers. The method comprises steps of receiving aCPLD firmware update signal; the CPLD setting a clock signal of the I2C bus to be 0; receiving a firmware updating completion signal of the CPLD; and the CPLD releasing the clock signal of the I2C bus so that the clock signal returns to normal. The method is used for updating the CPLD system without power failure, the clock signal of the I2C bus is set to be 0, the system does not access the CPLD system during updating, and the system does not report errors. Therefore, a technical problem that the BMC chip cannot control the CPLD during power-off updating and a technical problem of system error reporting during uninterruptible power updating are solved.

Description

technical field [0001] The invention relates to the technical field of computers, in particular to a CPLD update method, a server and a computer-readable storage medium. Background technique [0002] With the development of computer technology, CPLD (Complex Programmable Logic Device, Complex Programmable Logic Device) can be generated by the user according to the specific circuit structure to complete certain functions, and more and more servers use CPLD. Due to the introduction of new functions, the repair of legacy problems, etc., it is necessary to update the CPLD when the server is running. Circuit (integrated circuit bus) signal is connected to the CPLD to update the configuration of the CPLD. [0003] In the prior art, to update the firmware of the CPLD on the motherboard, it is necessary to power off the CPLD and then restart it. It is necessary to do an AC power off of the finishing system to replace the latest firmware, resulting in the inability of the BMC to mon...

Claims

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Application Information

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IPC IPC(8): G06F8/656
CPCG06F8/656
Inventor 陳信豪
Owner SUZHOU LANGCHAO INTELLIGENT TECH CO LTD
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